Scheduling configuration for deep learning networks
US-2024419956-A1 · Dec 19, 2024 · US
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Jacob Guy patents
Jacob Guy is listed as an inventor on 25 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Jacob Guy |
| Total patents | 25 |
| First publication | Jul 9, 2015 |
| Latest publication | Dec 19, 2024 |
Notable patents
Publications ranked by popularity score, then publication date.
Scheduling configuration for deep learning networks
US-12033063-B2 · Jul 9, 2024 · US
Hardware ip optimized convolutional neural network
US-2024112033-A1 · Apr 4, 2024 · US
Scheduling configuration for deep learning networks
US-2023281435-A1 · Sep 7, 2023 · US
Multiply-accumulate “0” data gating
US-11656846-B2 · May 23, 2023 · US
Scheduling configuration for deep learning networks
US-11599777-B2 · Mar 7, 2023 · US
Sub-graph in frequency domain and dynamic selection of convolution implementation on a GPU
US-11600035-B2 · Mar 7, 2023 · US
Sub-graph in frequency domain and dynamic selection of convolution implementation on a gpu
US-2022237850-A1 · Jul 28, 2022 · US
Sub-graph in frequency domain and dynamic selection of convolution implementation on a GPU
US-11250610-B2 · Feb 15, 2022 · US
Multiply-accumulate "0" data gating
US-2021141604-A1 · May 13, 2021 · US
Recent patents
Latest publications not already listed above.
Sub-graph in frequency domain and dynamic selection of convolution implementation on a gpu
US-2021049804-A1 · Feb 18, 2021 · US
Multiply-accumulate “0” data gating
US-10853035-B2 · Dec 1, 2020 · US
Multiply-accumulate "0" data gating
US-2020293282-A1 · Sep 17, 2020 · US
Sub-graph in frequency domain and dynamic selection of convolution implementation on a GPU
US-10762685-B2 · Sep 1, 2020 · US
Sub-graph in frequency domain and dynamic selection of convolution implementation on a gpu
US-2020143579-A1 · May 7, 2020 · US
Multiply-accumulate “0” data gating
US-10606559-B2 · Mar 31, 2020 · US
Multiply-accumulate "0" data gating
US-2019361674-A1 · Nov 28, 2019 · US
Sub-graph in frequency domain and dynamic selection of convolution implementation on a GPU
US-10467795-B2 · Nov 5, 2019 · US
Multiply-accumulate “0” data gating
US-10372416-B2 · Aug 6, 2019 · US
Multiply-accumulate "0" data gating
US-2018314492-A1 · Nov 1, 2018 · US
Scheduling configuration for deep learning networks
US-2018314934-A1 · Nov 1, 2018 · US
Hardware ip optimized convolutional neural network
US-2018307987-A1 · Oct 25, 2018 · US
Sub-graph in frequency domain and dynamic selection of convolution implementation on a gpu
US-2018293777-A1 · Oct 11, 2018 · US
Emotion-related query processing
US-9594807-B2 · Mar 14, 2017 · US
Emotion-related query processing
US-2015193507-A1 · Jul 9, 2015 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Intel Corp | 25 |
| Rappoport Rinat | 1 |
| Yehezkel Raanan | 1 |
| Fishtein Roman | 1 |
| Goffman Sergei | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06N3/045 | 23 |
| G06T1/20 | 18 |
| G06N3/084 | 15 |
| G06N3/0464 | 15 |
| G06N3/063 | 13 |