Method and system for geolocating a terminal in range of a transmitting device of interest
US-11438726-B2 · Sep 6, 2022 · US
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Garnier Philippe patents
Garnier Philippe is listed as an inventor on 9 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Garnier Philippe |
| Total patents | 9 |
| First publication | Apr 23, 2015 |
| Latest publication | Sep 6, 2022 |
Notable patents
Publications ranked by popularity score, then publication date.
Method and system for geolocating a terminal in range of a transmitting device of interest
US-2021314726-A1 · Oct 7, 2021 · US
Electronic chip manufacturing method
US-2018286878-A1 · Oct 4, 2018 · US
Electronic chip manufacturing method
US-10014308-B2 · Jul 3, 2018 · US
Electronic chip manufacturing method
US-2017200730-A1 · Jul 13, 2017 · US
Method for the formation of different gate metal regions of MOS transistors
US-9437498-B2 · Sep 6, 2016 · US
Method for fabricating NMOS and PMOS transistors on a substrate of the SOI, in particular FDSOI, type and corresponding integrated circuit
US-9412589-B2 · Aug 9, 2016 · US
Method for the formation of different gate metal regions of mos transistors
US-2015262884-A1 · Sep 17, 2015 · US
Method for fabricating nmos and pmos transistors on a substrate of the soi, in particular fdsoi, type and corresponding integrated circuit
US-2015108576-A1 · Apr 23, 2015 · US
Recent patents
Latest publications not already listed above.
No data yet.
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| St Microelectronics Crolles 2 Sas | 5 |
| Sigfox | 2 |
| St Microelectronics Crolles 2 | 2 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H01L27/11521 | 3 |
| H01L21/28273 | 3 |
| H01L29/7887 | 3 |
| H01L21/28282 | 3 |
| H01L27/11539 | 3 |