Balanced caching between a cache and a non-volatile memory based on rates corresponding to the cache and the non-volatile memory
US-11188474-B2 · Nov 30, 2021 · US
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De Arup patents
De Arup is listed as an inventor on 19 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | De Arup |
| Total patents | 19 |
| First publication | May 18, 2017 |
| Latest publication | Nov 30, 2021 |
Notable patents
Publications ranked by popularity score, then publication date.
Systems and methods for offloading processing from a host to storage processing units using an interconnect network
US-10725709-B2 · Jul 28, 2020 · US
Memory efficient persistent key-value store for non-volatile memories
US-10649969-B2 · May 12, 2020 · US
Hybrid logical to physical address translation for non-volatile storage devices with integrated compute module
US-10565123-B2 · Feb 18, 2020 · US
Balanced caching
US-2019384713-A1 · Dec 19, 2019 · US
Non-volatile storage system with compute engine to accelerate big data applications
US-10387303-B2 · Aug 20, 2019 · US
Programmable input/output (PIO) engine interface architecture with direct memory access (DMA) for multi-tagging scheme for storage devices
US-10318164-B2 · Jun 11, 2019 · US
Direct interface between graphics processing unit and data storage unit
US-10216419-B2 · Feb 26, 2019 · US
Systems and methods for offloading processing from a host to storage processing units using an interconnect network
US-2019034090-A1 · Jan 31, 2019 · US
Memory efficient persistent key-value store for non-volatile memories
US-2018357234-A1 · Dec 13, 2018 · US
Recent patents
Latest publications not already listed above.
Storage processing unit arrays and methods of use
US-10108377-B2 · Oct 23, 2018 · US
Hybrid logical to physical address translation for non-volatile storage devices with integrated compute module
US-2018293174-A1 · Oct 11, 2018 · US
Systems and methods for offloading processing from a host to storage processing units using an interconnect network
US-10095445-B2 · Oct 9, 2018 · US
Non-volatile storage system with compute engine to accelerate big data applications
US-2018052766-A1 · Feb 22, 2018 · US
Systems and methods for designating storage processing units as communication hubs and allocating processing tasks in a storage processor array
US-2017329640-A1 · Nov 16, 2017 · US
Systems and methods for offloading processing from a host to storage processing units using an interconnect network
US-2017286170-A1 · Oct 5, 2017 · US
Interface architecture for storage devices
US-2017147233-A1 · May 25, 2017 · US
Direct interface between graphics processing unit and data storage unit
US-2017147516-A1 · May 25, 2017 · US
Storage processor array for scientific computations
US-2017139606-A1 · May 18, 2017 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Western Digital Tech Inc | 15 |
| HGST Netherlands BV | 5 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06F3/061 | 11 |
| Y02D10/00 | 7 |
| G06F3/067 | 6 |
| G06F12/0246 | 6 |
| G06F3/0659 | 6 |