Semiconductor packages and methods of packaging semiconductor devices
US-11710681-B2 · Jul 25, 2023 · US
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Chaowasakoo Tanawan patents
Chaowasakoo Tanawan is listed as an inventor on 5 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Chaowasakoo Tanawan |
| Total patents | 5 |
| First publication | May 7, 2020 |
| Latest publication | Jul 25, 2023 |
Notable patents
Publications ranked by popularity score, then publication date.
Semiconductor packages and methods of packaging semiconductor devices
US-2022028762-A1 · Jan 27, 2022 · US
Conductive bonding layer with spacers between a package substrate and chip
US-11145575-B2 · Oct 12, 2021 · US
Reliable semiconductor packages
US-2021202339-A1 · Jul 1, 2021 · US
Semiconductor packages and methods of packaging semiconductor devices
US-2020144162-A1 · May 7, 2020 · US
Recent patents
Latest publications not already listed above.
No data yet.
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Utac Headquarters Pte Ltd | 5 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H10W72/886 | 5 |
| H10W72/07631 | 5 |
| H10W72/07636 | 5 |
| H10W72/076 | 5 |
| H10W72/07331 | 5 |