Correlating verification scenario coverage with hardware coverage events
US-2019251219-A1 · Aug 15, 2019 · US
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Behrend Joerg patents
Behrend Joerg is listed as an inventor on 10 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Behrend Joerg |
| Total patents | 10 |
| First publication | Dec 7, 2017 |
| Latest publication | Aug 15, 2019 |
Notable patents
Publications ranked by popularity score, then publication date.
First-in-first-out buffer
US-10372413-B2 · Aug 6, 2019 · US
Controlling an electronic circuit
US-10223226-B2 · Mar 5, 2019 · US
Controlling an electronic circuit
US-10146654-B2 · Dec 4, 2018 · US
Automated checker generation
US-10055522-B2 · Aug 21, 2018 · US
Controlling an electronic circuit
US-2018217907-A1 · Aug 2, 2018 · US
First-in-first-out buffer
US-2018136905-A1 · May 17, 2018 · US
Controlling an electronic circuit
US-2018137023-A1 · May 17, 2018 · US
First-in-first-out buffer
US-2018081623-A1 · Mar 22, 2018 · US
Automated checker generation
US-2017351788-A1 · Dec 7, 2017 · US
Recent patents
Latest publications not already listed above.
No data yet.
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| IBM | 10 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06F11/2289 | 4 |
| G06F11/263 | 4 |
| G06F11/2736 | 4 |
| G06F30/33 | 3 |
| G06F30/3308 | 3 |