Formal verification tool to verify hardware design of memory unit
US-11948652-B2 · Apr 2, 2024 · US
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Patent family 55132627
This patent family groups 6 related publications across US. Members often share priority claims or equivalent filings in different countries.
| Field | Value |
|---|---|
| Family ID | 55132627 |
| Family type | — |
| Earliest priority | Nov 11, 2015 |
| First filing country | US |
| Member publications | 6 |
| Countries | US |
| Representative publication | US11948652B2 — Formal verification tool to verify hardware design of memory unit |
Representative publication
Best representative member for this family based on priority and filing country.
US11948652B2 — Formal verification tool to verify hardware design of memory unit (published Apr 2, 2024)
Member publications
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Formal verification tool to verify hardware design of memory unit
US-2020185051-A1 · Jun 11, 2020 · US
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Hardware Monitor to Verify Memory Units
US-2017133104-A1 · May 11, 2017 · US