Chuck, lamination process, and manufacturing method of semiconductor package using the same
US-11993066-B2 · May 28, 2024 · US
used as a support during build up manufacturing of active devices
used as a support during build up manufacturing of active devices · Cooperative Patent Classification (CPC)
Electric circuits, power, telecommunications, and semiconductors.
Related technology areas
Mapped technology topics for this CPC code.
| Metric | Value |
|---|---|
| CPC code | H10P72/7426 |
| Official title | {used as a support during build up manufacturing of active devices} |
| Display label | used as a support during build up manufacturing of active devices |
| Total patents | 866 |
Filing trend
Year-over-year patent counts classified under this CPC code.
Filing activity over the last five years is declining.
| Year | Patents |
|---|---|
| 2015 | 68 |
| 2016 | 62 |
| 2017 | 68 |
| 2018 | 75 |
| 2019 | 76 |
| 2020 | 81 |
| 2021 | 90 |
| 2022 | 91 |
| 2023 | 103 |
| 2024 | 80 |
| 2025 | 58 |
| 2026 | 14 |
Representative patents
Representative publications under this CPC code from precomputed stats, or recent filings when stats are unavailable.
Group iii nitride composite substrate and method for manufacturing the same, laminated group iii nitride composite substrate, and group iii nitride semiconductor device and method for manufacturing the same
US-2015380496-A1 · Dec 31, 2015 · US
Semiconductor device having a through-substrate via
US-9224714-B2 · Dec 29, 2015 · US
Circuit and method for monolithic stacked integrated circuit testing
US-9222983-B2 · Dec 29, 2015 · US
Back-end-of-line stack for a stacked device
US-2015371938-A1 · Dec 24, 2015 · US
Peeling apparatus
US-2015367622-A1 · Dec 24, 2015 · US
Semiconductor system and device
US-9219005-B2 · Dec 22, 2015 · US
3d interconnect structure comprising through-silicon vias combined with fine pitch backside metal redistribution lines fabricated using a dual damascene type approach
US-2015364425-A1 · Dec 17, 2015 · US
Method for fabricating a flexible electronic structure and a flexible electronic structure
US-2015342036-A1 · Nov 26, 2015 · US
Flexible display substrate and a manufacturing method thereof, as well as a flexible display device
US-2015333115-A1 · Nov 19, 2015 · US
Manufacturing method of a flexible display
US-2015332885-A1 · Nov 19, 2015 · US
Semiconductor devices and methods for fabricating the same
US-9184136-B2 · Nov 10, 2015 · US
Light emitting device
US-2015311410-A1 · Oct 29, 2015 · US
Semiconductor device and method for manufacturing the same
US-9171808-B2 · Oct 27, 2015 · US
Display device, method of manufacturing the display device and carrier substrate for manufacturing display device
US-9166191-B2 · Oct 20, 2015 · US
Optoelectronic component with integrated protection diode and method of producing same
US-2015294961-A1 · Oct 15, 2015 · US
Flexible electronic structure
US-9159635-B2 · Oct 13, 2015 · US
Semiconductor device and method of forming discontinuous ESD protection layers between semiconductor die
US-9153544-B2 · Oct 6, 2015 · US
Epitaxial lift off stack having a pre-curved handle and methods thereof
US-2015279741-A1 · Oct 1, 2015 · US
3D interconnect structure comprising through-silicon vias combined with fine pitch backside metal redistribution lines fabricated using a dual damascene type approach
US-9142510-B2 · Sep 22, 2015 · US
Frequently asked questions
Answers are generated from the same data shown on this page.
- What is CPC H10P72/7426?
- CPC H10P72/7426 is the Cooperative Patent Classification code for “used as a support during build up manufacturing of active devices.”
- How many patents are filed under CPC H10P72/7426 (used as a support during build up manufacturing of active devices)?
- Our database includes 866 publications tagged with this CPC code.
- Is patent activity under CPC H10P72/7426 growing?
- Publication counts under this code: 80 in 2024 vs 58 in 2025 (latest complete years).