Structure with emedded efs3 and finfet device
US-2016379987-A1 · Dec 29, 2016 · US
comprising only one type of peripheral transistor
comprising only one type of peripheral transistor · Cooperative Patent Classification (CPC)
Electric circuits, power, telecommunications, and semiconductors.
Related technology areas
Mapped technology topics for this CPC code.
| Metric | Value |
|---|---|
| CPC code | H10B41/43 |
| Official title | comprising only one type of peripheral transistor |
| Display label | comprising only one type of peripheral transistor |
| Total patents | 288 |
Filing trend
Year-over-year patent counts classified under this CPC code.
Filing activity over the last five years is stable.
| Year | Patents |
|---|---|
| 2015 | 28 |
| 2016 | 41 |
| 2017 | 26 |
| 2018 | 26 |
| 2019 | 28 |
| 2020 | 26 |
| 2021 | 19 |
| 2022 | 22 |
| 2023 | 27 |
| 2024 | 25 |
| 2025 | 20 |
Representative patents
Representative publications under this CPC code from precomputed stats, or recent filings when stats are unavailable.
Non-volatile memory device having asymmetrical control gates surrounding a floating gate and manufacturing method thereof
US-9502257-B2 · Nov 22, 2016 · US
Method for etching high-k metal gate stack
US-2016336180-A1 · Nov 17, 2016 · US
Three-dimensional nonvolatile memory device
US-9496273-B2 · Nov 15, 2016 · US
Semiconductor device and method for fabricating the same
US-2016322372-A1 · Nov 3, 2016 · US
Semiconductor device and method for fabricating the same
US-9472562-B1 · Oct 18, 2016 · US
Method for forming a split-gate device
US-9472418-B2 · Oct 18, 2016 · US
Method for integrating non-volatile memory cells with static random access memory cells and logic transistors
US-2016267979-A1 · Sep 15, 2016 · US
Integration Of Split Gate Flash Memory Array And Logic Devices
US-2016260728-A1 · Sep 8, 2016 · US
Method of making embedded memory device with silicon-on-insulator substrate
US-9431407-B2 · Aug 30, 2016 · US
Methods for fabricating integrated circuits with a high-voltage MOSFET
US-9431408-B2 · Aug 30, 2016 · US
Method for etching high-k metal gate stack
US-9431255-B2 · Aug 30, 2016 · US
Semiconductor substrate arrangement, a semiconductor device, and a method for processing a semiconductor substrate
US-2016211250-A1 · Jul 21, 2016 · US
Method for manufacturing a semiconductor device
US-2016204116-A1 · Jul 14, 2016 · US
Techniques to avoid or limit implant punch through in split gate flash memory devices
US-2016204118-A1 · Jul 14, 2016 · US
Method for etching high-k metal gate stack
US-2016181107-A1 · Jun 23, 2016 · US
Semiconductor device and method of manufacturing the same
US-9368354-B2 · Jun 14, 2016 · US
Non-volatile memory cell and method of manufacturing the same
US-2016163722-A1 · Jun 9, 2016 · US
Compact Memory Device of the EEPROM Type
US-2016155506-A1 · Jun 2, 2016 · US
Split gate nanocrystal memory integration
US-9343314-B2 · May 17, 2016 · US
Frequently asked questions
Answers are generated from the same data shown on this page.
- What is CPC H10B41/43?
- CPC H10B41/43 is the Cooperative Patent Classification code for “comprising only one type of peripheral transistor.”
- How many patents are filed under CPC H10B41/43 (comprising only one type of peripheral transistor)?
- Our database includes 288 publications tagged with this CPC code.
- Is patent activity under CPC H10B41/43 growing?
- Publication counts under this code: 25 in 2024 vs 20 in 2025 (latest complete years).