Multi-port - multi mode reed solomon decoder
US-2022302929-A1 · Sep 22, 2022 · US
using the Berlekamp-Massey algorithm
using the Berlekamp-Massey algorithm · Cooperative Patent Classification (CPC)
Electric circuits, power, telecommunications, and semiconductors.
Related technology areas
Mapped technology topics for this CPC code.
| Metric | Value |
|---|---|
| CPC code | H03M13/153 |
| Official title | {using the Berlekamp-Massey algorithm} |
| Display label | using the Berlekamp-Massey algorithm |
| Total patents | 86 |
Filing trend
Year-over-year patent counts classified under this CPC code.
Filing activity over the last five years is declining.
| Year | Patents |
|---|---|
| 2015 | 7 |
| 2016 | 7 |
| 2017 | 5 |
| 2018 | 11 |
| 2019 | 11 |
| 2020 | 8 |
| 2021 | 7 |
| 2022 | 6 |
| 2023 | 8 |
| 2024 | 10 |
| 2025 | 5 |
| 2026 | 1 |
Representative patents
Representative publications under this CPC code from precomputed stats, or recent filings when stats are unavailable.
Reconfigurable fec
US-2022182078-A1 · Jun 9, 2022 · US
Semiconductor memory devices and methods of operating semiconductor memory devices
US-11314592-B2 · Apr 26, 2022 · US
Low-power error correction code computation in gf (2r)
US-2022021401-A1 · Jan 20, 2022 · US
Operating method of memory controller, storage device and the operating method thereof
US-11206046-B2 · Dec 21, 2021 · US
System and method for optimizing Reed-Solomon decoder for errors and erasures
US-11146293-B2 · Oct 12, 2021 · US
System and method for optimizing reed-solomon decoder for errors and erasures
US-2021288669-A1 · Sep 16, 2021 · US
Method and apparatus for encoding and decoding data in memory system
US-11115055-B2 · Sep 7, 2021 · US
Error correction apparatus, operation method thereof and memory system using the same
US-11095310-B2 · Aug 17, 2021 · US
Semiconductor memory devices and methods of operating semiconductor memory devices
US-2021191809-A1 · Jun 24, 2021 · US
Operating method of memory controller, storage device and the operating method thereof
US-2021050866-A1 · Feb 18, 2021 · US
Techniques for reducing latency in the detection of uncorrectable codewords
US-10804935-B2 · Oct 13, 2020 · US
Circuitry and method for dual mode reed-solomon-forward error correction decoder
US-10763895-B2 · Sep 1, 2020 · US
Reconfigurable fec
US-2020228146-A1 · Jul 16, 2020 · US
Method and apparatus for encoding and decoding data in memory system
US-2020228144-A1 · Jul 16, 2020 · US
Error correction apparatus, operation method thereof and memory system using the same
US-2020210292-A1 · Jul 2, 2020 · US
Reconfigurable FEC
US-10651874-B2 · May 12, 2020 · US
Method and decoder to adjust an error locator polynomial based on an error parity
US-10572189-B2 · Feb 25, 2020 · US
List decode circuits
US-10567003-B2 · Feb 18, 2020 · US
Error correction circuits and memory controllers including the same
US-10498364-B2 · Dec 3, 2019 · US
Frequently asked questions
Answers are generated from the same data shown on this page.
- What is CPC H03M13/153?
- CPC H03M13/153 is the Cooperative Patent Classification code for “using the Berlekamp-Massey algorithm.”
- How many patents are filed under CPC H03M13/153 (using the Berlekamp-Massey algorithm)?
- Our database includes 86 publications tagged with this CPC code.
- Is patent activity under CPC H03M13/153 growing?
- Publication counts under this code: 10 in 2024 vs 5 in 2025 (latest complete years).