Bit line voltage clamping read circuit for an in-memory compute operation where simultaneous access is made to plural rows of a static random access memory (sram)
US-2023386566-A1 · Nov 30, 2023 · US
Hybrid computing arrangements
Hybrid computing arrangements · Cooperative Patent Classification (CPC)
Computing, optics, measurement, and control technologies.
Related technology areas
Mapped technology topics for this CPC code.
| Metric | Value |
|---|---|
| CPC code | G06J1/00 |
| Official title | Hybrid computing arrangements |
| Display label | Hybrid computing arrangements |
| Total patents | 82 |
Filing trend
Year-over-year patent counts classified under this CPC code.
Filing activity over the last five years is stable.
| Year | Patents |
|---|---|
| 2016 | 1 |
| 2017 | 1 |
| 2018 | 7 |
| 2019 | 8 |
| 2020 | 11 |
| 2021 | 7 |
| 2022 | 14 |
| 2023 | 13 |
| 2024 | 13 |
| 2025 | 6 |
| 2026 | 1 |
Representative patents
Representative publications under this CPC code from precomputed stats, or recent filings when stats are unavailable.
Data processing system, operating method of the data processing system, and computing system using the data processing system and operating method of the data processing system
US-2023385562-A1 · Nov 30, 2023 · US
Semiconductor device
US-2023352477-A1 · Nov 2, 2023 · US
Compute-in memory (cim) device and computing method thereof
US-2023333814-A1 · Oct 19, 2023 · US
Reduced power consumption analog or hybrid mac neural network
US-2023244921-A1 · Aug 3, 2023 · US
Analog in-memory computing based inference accelerator
US-11699482-B2 · Jul 11, 2023 · US
Architecture for analog multiplier-accumulator with binary weighted charge transfer capacitors
US-11689213-B2 · Jun 27, 2023 · US
Techniques of performing operations using a hybrid analog-digital processor
US-2023177284-A1 · Jun 8, 2023 · US
Constrained optimization using an analog processor
US-2023110047-A1 · Apr 13, 2023 · US
Chopper stabilized analog multiplier unit element with binary weighted charge transfer capacitors
US-11593573-B2 · Feb 28, 2023 · US
Real time cognitive reasoning using a circuit with varying confidence level alerts
US-11551101-B2 · Jan 10, 2023 · US
Real time cognitive reasoning using a circuit with varying confidence level alerts
US-11526768-B2 · Dec 13, 2022 · US
Chopper Stabilized Bias Unit Element with Binary Weighted Charge Transfer Capacitors
US-2022383002-A1 · Dec 1, 2022 · US
Chopper Stabilized Analog Multiplier Unit Element with Binary Weighted Charge Transfer Capacitors
US-2022383001-A1 · Dec 1, 2022 · US
Architecture for Analog Multiplier-Accumulator with Binary Weighted Charge Transfer Capacitors
US-2022385301-A1 · Dec 1, 2022 · US
Mixed-signal acceleration of deep neural networks
US-2022350662-A1 · Nov 3, 2022 · US
Frequency information-based computer having sensor interface
US-11460920-B2 · Oct 4, 2022 · US
Unit Element for Asynchronous Analog Multiplier Accumulator
US-2022207247-A1 · Jun 30, 2022 · US
Parallelization and pipelining strategies for an efficient analog neural network accelerator
US-2022156469-A1 · May 19, 2022 · US
Memory-integrated neural network
US-2022114431-A1 · Apr 14, 2022 · US
Frequently asked questions
Answers are generated from the same data shown on this page.
- What is CPC G06J1/00?
- CPC G06J1/00 is the Cooperative Patent Classification code for “Hybrid computing arrangements.”
- How many patents are filed under CPC G06J1/00 (Hybrid computing arrangements)?
- Our database includes 82 publications tagged with this CPC code.
- Is patent activity under CPC G06J1/00 growing?
- Publication counts under this code: 13 in 2024 vs 6 in 2025 (latest complete years).