Propagating a prefetching profile bit from a prefetch queue to a data cache to indicate that a line was prefetched in response to an instruction within a code region
US-10013326-B2 · Jul 3, 2018 · US
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Latorre Fernando patents
Latorre Fernando holds 4 patents in our database, with recent filings and technology areas summarized below.
| Metric | Value |
|---|---|
| Total patents | 4 |
| Recent patents | 0 |
| First publication | Oct 13, 2015 |
| Latest publication | Jul 3, 2018 |
Filing trend
Year-over-year patent counts for this assignee.
Recent patents
Latest publications where this party is an assignee.
Utilization of register checkpointing mechanism with pointer swapping to resolve multithreading mis-speculations
US-9940138-B2 · Apr 10, 2018 · US
Managed instruction cache prefetching
US-9811341-B2 · Nov 7, 2017 · US
Stride-based translation lookaside buffer (TLB) prefetching with adaptive offset
US-9158705-B2 · Oct 13, 2015 · US
Notable patents
Representative or frequently cited publications from precomputed assignee stats.
Propagating a prefetching profile bit from a prefetch queue to a data cache to indicate that a line was prefetched in response to an instruction within a code region
US-10013326-B2 · Jul 3, 2018 · US
Utilization of register checkpointing mechanism with pointer swapping to resolve multithreading mis-speculations
US-9940138-B2 · Apr 10, 2018 · US
Managed instruction cache prefetching
US-9811341-B2 · Nov 7, 2017 · US
Stride-based translation lookaside buffer (TLB) prefetching with adaptive offset
US-9158705-B2 · Oct 13, 2015 · US
Top CPC classifications
Most common classification codes in this portfolio.
| CPC | Patents |
|---|---|
| G06F12/0862 | 3 |
| G06F9/3842 | 1 |
| G06F9/3863 | 1 |
| G06F11/1402 | 1 |
| G06F9/3851 | 1 |
Technology areas
Mapped technology topics for this assignee.
| Technology | Patents |
|---|---|
| Physics | 4 |