Signed multiplier circuit utilizing a uniform array of logic blocks
US-9411554-B1 · Aug 9, 2016 · US
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Young Steven P patents
Young Steven P holds 4 patents in our database, with recent filings and technology areas summarized below.
| Metric | Value |
|---|---|
| Total patents | 4 |
| Recent patents | 0 |
| First publication | Jan 13, 2015 |
| Latest publication | Aug 9, 2016 |
Filing trend
Year-over-year patent counts for this assignee.
Recent patents
Latest publications where this party is an assignee.
Notable patents
Representative or frequently cited publications from precomputed assignee stats.
Signed multiplier circuit utilizing a uniform array of logic blocks
US-9411554-B1 · Aug 9, 2016 · US
Method and apparatus to reduce power segmentation overhead within an integrated circuit
US-9058454-B1 · Jun 16, 2015 · US
Circuits for shifting bussed data
US-9002915-B1 · Apr 7, 2015 · US
Method and apparatus for programmable device testing in stacked die applications
US-8933447-B1 · Jan 13, 2015 · US
Top CPC classifications
Most common classification codes in this portfolio.
| CPC | Patents |
|---|---|
| G06F2113/18 | 1 |
| G06F30/30 | 1 |
| G06F30/34 | 1 |
| G06F30/392 | 1 |
| G06F30/394 | 1 |
Technology areas
Mapped technology topics for this assignee.
| Technology | Patents |
|---|---|
| Physics | 4 |
| Electricity | 2 |