Delay-compensated error indication signal
US-9710323-B2 · Jul 18, 2017 · US
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Vergis George patents
Vergis George holds 5 patents in our database, with recent filings and technology areas summarized below.
| Metric | Value |
|---|---|
| Total patents | 5 |
| Recent patents | 0 |
| First publication | Oct 1, 2015 |
| Latest publication | Jul 18, 2017 |
Filing trend
Year-over-year patent counts for this assignee.
Recent patents
Latest publications where this party is an assignee.
Dynamic linking of codesets in universal remote control devices
US-9621836-B2 · Apr 11, 2017 · US
Accessing data stored in a command/address register device
US-9442871-B2 · Sep 13, 2016 · US
Adaptive voltage input to a charge pump
US-9355688-B2 · May 31, 2016 · US
Apparatus, method and system for providing termination for multiple chips of an integrated circuit package
US-2015279444-A1 · Oct 1, 2015 · US
Notable patents
Representative or frequently cited publications from precomputed assignee stats.
Delay-compensated error indication signal
US-9710323-B2 · Jul 18, 2017 · US
Dynamic linking of codesets in universal remote control devices
US-9621836-B2 · Apr 11, 2017 · US
Accessing data stored in a command/address register device
US-9442871-B2 · Sep 13, 2016 · US
Adaptive voltage input to a charge pump
US-9355688-B2 · May 31, 2016 · US
Apparatus, method and system for providing termination for multiple chips of an integrated circuit package
US-2015279444-A1 · Oct 1, 2015 · US
Top CPC classifications
Most common classification codes in this portfolio.
| CPC | Patents |
|---|---|
| G11C11/4074 | 2 |
| G11C7/1072 | 2 |
| G06F11/10 | 2 |
| G11C2029/0411 | 2 |
| G11C29/44 | 2 |
Technology areas
Mapped technology topics for this assignee.
| Technology | Patents |
|---|---|
| Physics | 5 |
| Electricity | 1 |
| Cross-Sectional Technologies | 1 |