Power saving techniques in computing devices

Patent metadata

Field	Value
Publication number	US-RE50641-E
Application number	US-202318226624-A
Country	US
Kind code	E1
Filing date	Jul 26, 2023
Priority date	Dec 16, 2013
Publication date	Oct 14, 2025
Grant date	Oct 14, 2025

Abstract

Aspects disclosed in the detailed description include power saving techniques in computing devices. In particular, as data is received by a modem processor in a computing device, the data is held until the expiration of a modem timer. The data is then passed to an application processor in the computing device over a peripheral component interconnect express (PCIe) interconnectivity bus. On receipt of the data from the modem processor, the application processor sends data held by the application processor to the modem processor over the PCIe interconnectivity bus. The application processor also has an uplink timer. If no data is received from the modem processor before expiration of the uplink timer, the application processor sends any collected data to the modem processor at expiration of the uplink timer. However, if data is received from the modem processor, the uplink timer is reset.

First claim

What is claimed is:

1. A mobile terminal comprising:
a modem timer; a modem processor, the modem processor configured to hold modem processor to application processor data until expiration of the modem timer; an application processor; an interconnectivity bus communicatively coupling the application processor to the modem processor; and the application processor configured to hold application processor to modem processor data until triggered by receipt of the modem processor to application processor data from the modem processor through the interconnectivity bus after which the application processor to modem processor data is sent to the modem processor through the interconnectivity bus responsive to the receipt of the modem processor to application processor data from the modem processor through the interconnectivity bus.

2. The mobile terminal of claim 1 , wherein the interconnectivity bus comprises a peripheral component interconnect (PCI) compliant bus.

3. The mobile terminal of claim 2 , wherein the PCI compliant bus comprises a PCI express (PCIe) bus.

4. The mobile terminal of claim 1 , wherein the application processor includes an uplink timer and the uplink timer has a period longer than a period of the modem timer.

5. The mobile terminal of claim 4 , wherein the application processor is configured to hold the application processor to modem processor data until receipt of the modem processor to application processor data from the modem processor or expiration of the uplink timer having a period longer than a period of the modem timer, whichever occurs first.

6. The mobile terminal of claim 1 , wherein the modem timer is implemented in software.

7. The mobile terminal of claim 1 , wherein the modem timer has a period of approximately six (6) milliseconds.

8. The mobile terminal of claim 1 , wherein the modem processor comprises the modem timer.

9. The mobile terminal of claim 1 , wherein the application processor comprises the modem timer.

10. The mobile terminal of claim 1 , further comprising an application timer, and wherein the modem processor is configured to instruct the application processor to send an interrupt if no data is received within one time slot of the application timer.

11. The mobile terminal of claim 1 , further comprising a byte accumulation limit counter associated with the modem processor, the modem processor configured to send data to the application processor if a threshold associated with the byte accumulation limit counter is exceeded.

12. The mobile terminal of claim 1 , further comprising a packet number limit counter associated with the modem processor, the modem processor configured to send data to the application processor if a threshold associated with the packet number limit counter is exceeded.

13. The mobile terminal of claim 1 , wherein the modem processor is configured to determine if held data comprises a control packet and send such control packet before expiration of the modem timer.

14. The mobile terminal of claim 3 , wherein the modem processor further comprises an application timer, and the modem processor is configured to pull data from the application processor on receipt of the modem processor to application processor data or expiration of the application timer.

15. The mobile terminal of claim 1 , further comprising a second modem processor, the second modem processor configured to exchange data availability information with the modem processor such that traffic on the modem processor can trigger data transfer for the second modem processor.

16. A method of controlling power consumption in a computing device, comprising:
holding data received by a modem processor from a remote network until expiration of a downlink timer; passing the data received by the modem processor to an application processor over an interconnectivity bus; and holding application data generated by an application associated with the application processor until receipt of the data from the modem processor or expiration of an uplink timer, whichever occurs first, wherein receipt of the data from the modem processor triggers passing the data received by the application processor to the modem processor over the interconnectivity bus before the interconnectivity bus transitions from an active power state to a low power state.

17. The method of claim 16 , wherein passing the data comprises passing the data over a peripheral component interface (PCI) compliant bus.

18. The method of claim 16 , wherein a period of the downlink timer comprises six (6) milliseconds.

19. The method of claim 16 , wherein a period of the uplink timer comprises seven (7) milliseconds.

20. The method of claim 16 , further comprising providing an override capability based on one of accumulated packet size, accumulated packet count, accumulated byte count, quality of service requirement, and control message status.

21. The method of claim 16 , further comprising holding data at a second modem processor until traffic on the modem processor triggers data transfer for the second modem processor.

22. A mobile terminal comprising:
a modem processor; an application timer; an application processor, the application processor configured to hold application processor to modem processor data until expiration of the application timer; an interconnectivity bus communicatively coupling the application processor to the modem processor; and the modem processor configured to hold modem processor to application processor data until triggered by receipt of the application processor to modem processor data from the application processor through the interconnectivity bus after which the modem processor to application processor data is sent to the application processor through the interconnectivity bus responsive to the receipt of the application processor to modem processor data from the application processor through the interconnectivity bus.

23. The mobile terminal of claim 22 , wherein the application processor comprises the application timer.

24. The mobile terminal of claim 22 , wherein the modem processor comprises the application timer.

25. The mobile terminal of claim 22 , further comprising a byte counter counting bytes at the modem processor.

26. A mobile terminal comprising:
a modem byte accumulation limit counter; a modem processor, the modem processor configured to hold modem processor to application processor data until a predefined threshold of bytes has been reached by the modem byte accumulation limit counter; an application processor; an interconnectivity bus communicatively coupling the application processor to the modem processor; and the application processor configured to hold application processor to modem processor data until triggered by receipt of the modem processor to application processor data from the modem processor through the interconnectivity bus after which the application processor to modem processor data is sent to the modem processor through the interconnectivity bus responsive to the receipt of the modem processor to application processor data from the modem processor through the interconnectivity bus.

27. A mobile terminal comprising:
a modem packet counter; a modem processor, the modem processor configured to hold modem processor to application processor data until a predefined threshold of packets has been reached by the modem packet counter; a

Assignees

• Qualcomm Inc

Inventors

• Kaushik Vinod Harimohan
• Babbar Uppinder Singh
• Danaila Andrei
• Klacar Neven
• Krishnamoorthy Muralidhar Coimbatore
• Krishnamurthy Arunn Coimbatore
• Kumar Vaibhav
• Kumar Vanitha Aravamudhan
• Maheshwari Shailesh
• Mitra Alok
• Pius Roshan Thomas
• Sukumar Hariharan

Classifications

• H04W52/0287

  changing the clock frequency of a controller in the equipment · CPC title

• G06F1/3253

  Power saving in bus · CPC title

• H04W52/0274

  by switching on or off the equipment or parts thereof · CPC title

• G06F1/3287

  by switching off individual functional units in the computer system · CPC title

• Y02D30/70

  in wireless communication networks · CPC title