Power saving techniques in computing devices

USRE49652E · US · E1

Patent metadata
FieldValue
Publication numberUS-RE49652-E
Application numberUS-202117240496-A
CountryUS
Kind codeE1
Filing dateApr 26, 2021
Priority dateDec 16, 2013
Publication dateSep 12, 2023
Grant dateSep 12, 2023

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Aspects disclosed in the detailed description include power saving techniques in computing devices. In particular, as data is received by a modem processor in a computing device, the data is held until the expiration of a modem timer. The data is then passed to an application processor in the computing device over a peripheral component interconnect express (PCIe) interconnectivity bus. On receipt of the data from the modem processor, the application processor sends data held by the application processor to the modem processor over the PCIe interconnectivity bus. The application processor also has an uplink timer. If no data is received from the modem processor before expiration of the uplink timer, the application processor sends any collected data to the modem processor at expiration of the uplink timer. However, if data is received from the modem processor, the uplink timer is reset.

First claim

Opening claim text (preview).

What is claimed is: 1. A mobile terminal comprising: a modem timer; a modem processor, the modem processor configured to hold modem processor to application processor data until expiration of the modem timer; an application processor; an interconnectivity bus communicatively coupling the application processor to the modem processor; and the application processor configured to hold application processor to modem processor data until triggered by receipt of the modem processor to application processor data from the modem processor through the interconnectivity bus after which the application processor to modem processor data is sent to the modem processor through the interconnectivity bus responsive to the receipt of the modem processor to application processor data from the modem processor through the interconnectivity bus. 2. The mobile terminal of claim 1 , wherein the interconnectivity bus comprises a peripheral component interconnect (PCI) compliant bus. 3. The mobile terminal of claim 2 , wherein the PCI compliant bus comprises a PCI express (PCIe) bus. 4. The mobile terminal of claim 1 , wherein the application processor includes an uplink timer and the uplink timer has a period longer than a period of the modem timer. 5. The mobile terminal of claim 4 , wherein the application processor is configured to hold the application processor to modem processor data until receipt of the modem processor to application processor data from the modem processor or expiration of the uplink timer having a period longer than a period of the modem timer, whichever occurs first. 6. The mobile terminal of claim 1 , wherein the modem timer is implemented in software. 7. The mobile terminal of claim 1 , A mobile terminal comprising: a modem timer; a modem processor, the modem processor configured to hold modem processor to application processor data until expiration of the modem timer; an application processor; an interconnectivity bus communicatively coupling the application processor to the modem processor; and the application processor configured to hold application processor to modem processor data until triggered by receipt of the modem processor to application processor data from the modem processor through the interconnectivity bus after which the application processor to modem processor data is sent to the modem processor through the interconnectivity bus responsive to the receipt of the modem processor to application processor data from the modem processor through the interconnectivity bus, wherein the modem timer has a period of approximately six (6) milliseconds. 8. The mobile terminal of claim 1 , wherein the modem processor comprises the modem timer. 9. The mobile terminal of claim 1 , wherein the application processor comprises the modem timer. 10. The mobile terminal of claim 1 , further comprising A mobile terminal comprising: a modem timer; a modem processor, the modem processor configured to hold modem processor to application processor data until expiration of the modem timer; an application processor; an interconnectivity bus communicatively coupling the application processor to the modem processor; the application processor configured to hold application processor to modem processor data until triggered by receipt of the modem processor to application processor data from the modem processor through the interconnectivity bus after which the application processor to modem processor data is sent to the modem processor through the interconnectivity bus responsive to the receipt of the modem processor to application processor data from the modem processor through the interconnectivity bus; and an application timer, and wherein the modem processor is configured to instruct the application processor to send an interrupt if when no data is received within one time slot of the application timer. 11. The mobile terminal of claim 1 , further comprising a byte accumulation limit counter associated with the modem processor, the modem processor configured to send data to the application processor if a threshold associated with the byte accumulation limit counter is exceeded. 12. The mobile terminal of claim 1 , further comprising a packet number limit counter associated with the modem processor, the modem processor configured to send data to the application processor if a threshold associated with the packet number limit counter is exceeded. 13. The mobile terminal of claim 1 , wherein the modem processor is configured to determine if held data comprises a control packet and send such control packet before expiration of the modem timer. 14. The mobile terminal of claim 3 , wherein the modem processor further comprises an application timer, and the modem processor is configured to pull data from the application processor on receipt of the modem processor to application processor data or expiration of the application timer. 15. The mobile terminal of claim 1 , further comprising A mobile terminal comprising: a modem timer; a modem processor, the modem processor configured to hold modem processor to application processor data until expiration of the modem timer; an application processor; an interconnectivity bus communicatively coupling the application processor to the modem processor; the application processor configured to hold application processor to modem processor data until triggered by receipt of the modem processor to application processor data from the modem processor through the interconnectivity bus after which the application processor to modem processor data is sent to the modem processor through the interconnectivity bus responsive to the receipt of the modem processor to application processor data from the modem processor through the interconnectivity bus; and a second modem processor, the second modem processor configured to exchange data availability information with the modem processor such that traffic on the modem processor can trigger data transfer for the second modem processor. 16. A method of controlling power consumption in a computing device, comprising: holding data received by a modem processor from a remote network until expiration of a downlink timer; passing the data received by the modem processor to an application processor over an interconnectivity bus; and holding application data generated by an application associated with the application processor until receipt of the data from the modem processor or expiration of an uplink timer, whichever occurs first, wherein receipt of the data from the modem processor triggers passing the data received by the application processor to the modem processor over the interconnectivity bus before the interconnectivity bus transitions from an active power state to a low power state. 17. The method of claim 16 , wherein passing the data comprises passing the data over a peripheral component interface (PCI) compliant bus. 18. The method of claim 16 , A method of controlling power consumption in a computing device, comprising: holding data received by a modem processor from a remote network until expiration of a downlink timer; passing the data received by the modem processor to an application processor over an interconnectivity bus; and holding application data generated by an application associated with the application processor until receipt of the data from the modem processor or expiration of an uplink timer, whichever occurs first, wherein the receipt of the data from the modem processor triggers passing the application data received by the application process

Assignees

Inventors

Classifications

  • using monitoring of local events, e.g. events related to user activity · CPC title

  • Energy efficient computing, e.g. low power processors, power management or thermal management · CPC title

  • by switching on or off the equipment or parts thereof · CPC title

  • Information transfer, e.g. on bus (G06F13/14 takes precedence) · CPC title

  • Subscription-based services using application servers or record carriers, e.g. SIM application toolkits · CPC title

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Frequently asked questions

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What does patent USRE49652E cover?
Aspects disclosed in the detailed description include power saving techniques in computing devices. In particular, as data is received by a modem processor in a computing device, the data is held until the expiration of a modem timer. The data is then passed to an application processor in the computing device over a peripheral component interconnect express (PCIe) interconnectivity bus. On rece…
Who is the assignee on this patent?
Qualcomm Inc
What technology area does this patent fall under?
Primary CPC classification H04W52/0251. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 12 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (E1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).