Fully differential demodulator with variable gain, and method for demodulating a signal

Patent metadata

Field	Value
Publication number	US-RE48086-E
Application number	US-201313952514-A
Country	US
Kind code	E1
Filing date	Jul 26, 2013
Priority date	Feb 15, 2007
Publication date	Jul 7, 2020
Grant date	Jul 7, 2020

Abstract

A demodulator is provided for demodulating an amplitude-modulated input signal defined by a carrier signal having a carrier frequency modulated by a modulating signal, the demodulator including an amplifier stage having a gain and structured to receive the amplitude-modulated input signal, and a gain control stage coupled to the amplifier stage and configured to vary the gain of the amplifier stage according to the carrier frequency of the carrier signal.

First claim

The invention claimed is:

1. A demodulator for an amplitude-modulated input signal defined by a carrier signal having a carrier frequency modulated by a modulating signal, the demodulator, comprising:
an amplifier stage having a gain and structured to receive the amplitude-modulated including circuitry which, in operation, receives a modulated input signal that includes a carrier signal modulated by a modulating signal; and
a gain-control control stage electrically coupled to an input and an output of the amplifier stageand configured, the control stage including circuitry which, in operation,
generates timing signals according a frequency of the carrier signal,
provides the timing signals to the input of the amplifier stage to vary the a gain of the amplifier stage according to the carrier frequency of the carrier signal,
receives an output signal from the output of the amplifier stage, and
varies the output signal according to the frequency of the carrier signal.

2. The demodulator of claim 1 wherein the amplifier stage comprises a negative-feedback operational amplifier and controllable capacitive networks coupled to inputs of the operational amplifier and having variable capacitance.

3. The demodulator of claim 2 wherein the gain-control control stage is coupled to the controllable capacitive networks and provides the timing signals to the controllable capacitive networks for modifying the variable capacitance with a periodic signal equal to the carrier frequency.

4. The demodulator of claim 3 wherein the gain-control control stage is configured to modify the variable capacitance of the controllable capacitive networks according to a discrete sinusoid.

5. The demodulator of claim 3 wherein the gain-control control stage is configured to execute an integer number of control cycles of the gain in each cycle of the carrier signal and to select a respective value of the variable capacitance of the controllable capacitive networks in each control cycle of the gain.

6. The demodulator of claim 5 wherein the controllable capacitive networks each comprise a plurality of respective control capacitors that are each selectively connectable to the inputs of the operational amplifier.

7. The demodulator of claim 6 wherein the gain-control control stage is configured to connect a single control capacitor to each input of the operational amplifier.

8. The demodulator of claim 6 wherein the gain-control control stage is configured to connect in parallel a plurality of control capacitors to each input of the operational amplifier at least in a control cycle of the gain.

9. The demodulator of claim 1 wherein the gain-control control stage comprises a sign-inverting circuit cascaded to the amplifier stage and having a first input, a second input, a first output, and a second output and wherein, in a first operating configuration, the first input and the second input are connected to the first output and to the second output, respectively, and, in a second operating configuration, the first input and the second input are connected to the second output and to the first output, respectively.

10. The demodulator of claim 9 wherein the gain-control control stage controls the sign-inverting circuit in the first operating configuration in a first half-period of the carrier signal frequency and in the second operating configuration in a second half-period of the carrier signal frequency.

11. The demodulator of claim 1 , comprising outputs wherein the gain-control control stage comprises a zero circuit cascaded to the amplifier stage and controlled so as to couple the amplifier stage to the outputs in a first operating configuration and uncouple the amplifier stage from the outputs in a second operating configuration.

12. The demodulator of claim 1 wherein the amplifier stage comprises an offset-sampling circuit structured to store an offset of the an operational amplifier in a first step of operation, and a feedback circuit configured to erase the offset in a second step of operation.

13. A method for demodulation of a signal, comprising:
receiving, by an amplifier stage, an amplitude-modulated input signal, defined by a carrier signal at a carrier frequency and a modulating signal; and
generating, by a control stage, timing signals according to the carrier frequency of the carrier signal;
amplifying, by the amplifier stage, the input signal with a gain that is varied according to the carrier frequency of the carrier signal;
receiving, by the control stage, an output signal from the amplifier stage; and
varying the output signal according to the carrier frequency of the carrier signal.

14. The method of claim 13 wherein the step of varying the gain comprises executing an integer number of control cycles of the gain in each cycle of the carrier signal.

15. The method of claim 14 wherein the step of varying the gain comprises: includes modifying a variable capacitance of a capacitive network defining the gain at each control cycle of the gain;, and the step of varying the output signal comprises inverting a sign of the gain output signal at each half-period of the carrier signal.

16. The method of claim 14 wherein the step of modifying comprises selecting a capacitor from amongst a plurality of capacitors at each control cycle of the gain.

17. The method of claim 16 wherein the step of modifying comprises selecting a plurality of capacitors in parallel in at least one control cycle of the gain.

18. A circuit system, comprising:
a microelectromechanical device;
a variable gain amplifier stage adapted to receive coupled to the microelectromechanical device, the variable gain amplifier stage including circuitry which, in operation, receives an amplitude modulated signal from the microelectromechanical device, and to generate generates an output signal having a gain; and
a gain control stage coupled to the variable gain amplifier stage, the gain control stage adapted to receive as input, in operation, receives a carrier signal of the amplitude modulated signal from the microelectromechanical device, the control stage including:
a timing signal generator which, in operation, generates timing signals based on a frequency of the carrier signal, and provides the timing signals to the variable gain amplifier stage, the variable gain amplifier stage, in operation, varies the gain of the output signal based on the timing signals;
and to generate a gain control signal to control the gain of the variable gain amplifier stage in response to a frequency ofa sign-inverting circuit which, in operation, receives the output signal, and inverts the output signal at each half-period of the carrier signal and to bring the amplitude modulated signal into a baseband in the output signal; and
a zero circuit which, in operation, couples and uncouples the sign-inverting circuit from the variable gain amplifier stage at each half-period of the carrier signal.

19. The circuit system of claim 18 wherein the gain control stage varies the a gain of the variable gain amplifier stage according to a zero-mean discrete sinusoid at the carrier frequency of the carrier signal, and the gain control signal is applied to the amplitude modulated signal to demodulate brings the amplitude modulated signal into the a baseband in the output signal.

20. The circuit system of claim 19 wherein the gain control stage is adapted to generate timing signals that are applied to a controllable capacitance network circuit in the variable gain amplifier stage to select

Assignees

• St Microelectronics Srl

Inventors

• Prandi Luciano
• Caminada Carlo
• Invernizzi Paolo

Classifications

• H03D1/00 Primary

  Demodulation of amplitude-modulated oscillations (H03D5/00, H03D9/00, H03D11/00 take precedence) · CPC title

• G01C19/00

  Gyroscopes; Turn-sensitive devices using vibrating masses; Turn-sensitive devices without moving masses; Measuring angular rate using gyroscopic effects · CPC title

• H03D1/22 Primary

  Homodyne or synchrodyne circuits {(receiver circuits H04B1/30)} · CPC title

• Y10T74/1218

  Combined · CPC title