Integrated circuit chip having anti-moisture-absorption film at edge thereof and method of forming anti-moisture-absorption film

USRE46549E · US · E1

Patent metadata
FieldValue
Publication numberUS-RE46549-E
Application numberUS-201314025203-A
CountryUS
Kind codeE1
Filing dateSep 12, 2013
Priority dateNov 26, 1999
Publication dateSep 12, 2017
Grant dateSep 12, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An integrated circuit chip having an anti-moisture-absorption film at the edge thereof and a method of forming the anti-moisture-absorption film are provided. In the integrated circuit chip which has predetermined devices inside and whose uppermost layer is covered with a passivation film, a trench is formed by etching interlayer dielectric films to a predetermined depth along the perimeter of the integrated circuit chip to be adjacent to the edge of the integrated circuit chip and an anti-moisture-absorption film is formed to fill the trench or is formed on the sidewall of the trench to a predetermined thickness, in order to prevent moisture from seeping into the edge of the integrated circuit chip. Moisture is effectively prevented from seeping into the edge of the chip by forming the anti-moisture-absorption film at the edge of the chip using the conventional processes of manufacturing the integrated circuit chip without an additional process.

First claim

Opening claim text (preview).

What is claimed is: 1. An integrated circuit device, comprising: an integrated circuit chip; a plurality of devices formed in the integrated circuit chip; a scribe line formed at and defining the perimeter of the integrated circuit chip, said scribe line being used in separating the integrated circuit chip from other integrated circuit chips; a passivation film formed on the integrated circuit chip; a trench at a predetermined depth along the perimeter of the integrated circuit chip adjacent to the edge of the integrated circuit chip, the trench being formed at the scribe line at the perimeter of the integrated circuit chip, the predetermined depth being such that a boundary between multiple layers interlayer dielectric films of the integrated circuit device intersects a sidewall of the trench; and an etching stop film formed under at least one of said multiple interlayer dielectric films, such that the bottom of said trench corresponding to said predetermined depth is formed within said one of said multiple interlayer dielectric films; and an anti-moisture-absorption film in the trench at a predetermined thickness, said anti-moisture-absorption film covering the boundary between the multiple layers interlayer dielectric films such that moisture is prevented from seeping into the edge of the integrated circuit chip. 2. The integrated circuit device of claim 1 , wherein the anti-moisture-absorption film is formed on the sidewall of the trench. 3. The integrated circuit device of claim 1 , wherein the trench is etched into at least one interlayer dielectric film of the integrated circuit chip. 4. The integrated circuit device of claim 1 9, wherein the anti-moisture-absorption film is formed by extending the passivation film at least to a sidewall of the trench. 5. The integrated circuit device of claim 1 , wherein the anti-moisture-absorption film comprises a conductive layer pattern which fills the trench to a predetermined thickness and a passivation film extended so as to cover the conductive layer pattern. 6. The integrated circuit device of claim 5 , wherein the conductive pattern is formed of the same material as an uppermost interconnection layer of the integrated circuit chip. 7. The integrated circuit device of claim 1 , wherein the anti-moisture-absorption film comprises a conductive layer pattern which is formed on the sidewall of the trench to a predetermined thickness and a passivation film extended so as to cover the conductive layer pattern. 8. The integrated circuit device of claim 1, wherein the anti-moisture absorption film comprises a conductive anti-moisture absorption film. 9. The integrated circuit device of claim 1, wherein the anti-moisture absorption film comprises an insulative anti-moisture absorption film.

Assignees

Inventors

Classifications

  • the encapsulations being in grooves in the semiconductor body · CPC title

  • H10W76/48Primary

    Fillings including materials for absorbing or reacting with moisture or other undesired substances · CPC title

  • H10P14/60Primary

    of insulating materials · CPC title

  • H01L23/26Primary

    Electricity · mapped topic

  • Electricity · mapped topic

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What does patent USRE46549E cover?
An integrated circuit chip having an anti-moisture-absorption film at the edge thereof and a method of forming the anti-moisture-absorption film are provided. In the integrated circuit chip which has predetermined devices inside and whose uppermost layer is covered with a passivation film, a trench is formed by etching interlayer dielectric films to a predetermined depth along the perimeter of …
Who is the assignee on this patent?
Conversant Intellectual Property Man Inc
What technology area does this patent fall under?
Primary CPC classification H10W76/48. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 12 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (E1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).