Printed circuit board and method of fabricating an element

Patent metadata

Field	Value
Publication number	US-9991196-B2
Application number	US-201715435398-A
Country	US
Kind code	B2
Filing date	Feb 17, 2017
Priority date	Mar 18, 2016
Publication date	Jun 5, 2018
Grant date	Jun 5, 2018

Abstract

The present invention provides a printed circuit board fabricated by a Non-Plating Process that includes at least one plating bar disposed around at least one package unit of the printed circuit board. The package unit includes at least one ground line, at least one power line and a plurality of signal lines. The ground line has a first contact pad exposed on a surface of the printed circuit board, and at least one of the ground lines is connected to the plating bar. The power line has a second contact pad exposed on the surface, and at least one of the power lines is connected to the neighboring plating bar. The signal line has a third contact pad exposed on the surface.

First claim

What is claimed is:

1. A printed circuit board, having a plurality of edges, comprising:
at least one ground line, wherein the ground line has a first contact pad exposed on a first surface of the printed circuit board;
at least one power line, wherein the power line has a second contact pad exposed on the first surface of the printed circuit board; and
a plurality of signal lines, wherein each of the signal lines has a third contact pad exposed on the first surface of the printed circuit board, wherein the printed circuit board is fabricated by a Non-Plating process, a terminal of at least one of the ground lines is extended to reach a first edge of the edges and exposed on a second surface which is on the first edge and vertical to the first surface, and a terminal of at least one of the power lines is extended to a second edge of the edges and exposed on a third surface which is on the second edge and vertical to the first surface.

2. The printed circuit board as claimed in claim 1 , wherein at least one of the signal lines is not exposed on any surface which is on the edges and vertical to the first surface.

3. The printed circuit board as claimed in claim 1 , wherein the signal lines are not exposed on any surface which is on the edges and vertical to the first surface.

4. The printed circuit board as claimed in claim 1 , wherein the terminals of the power lines are extended to reach the second edge and exposed on the third surface which is on the second edge.

5. The printed circuit board as claimed in claim 1 , wherein the terminals of all of the power lines are extended to reach the second edge of the edges and exposed on the third surface which is on the second edge.

6. A method of fabricating an element, comprising:
applying a non-plating process to fabricate a printed circuit board, wherein the printed circuit board is divided into a plurality of package units, and the non-plating process fabricating the printed circuit board comprises:
performing a first plating through at least one ground pad to form at least one ground line and at least one power line on the surface of each of the package units of the printed circuit board; and
performing a second plating to form a plurality of first signal lines on the surface of each of the package units of the printed circuit board.

7. The method as claimed in claim 6 , wherein in the first plating, the at least one ground line and the at least one power line are coupled through a plating bar, so that the at least one ground line and the at least one power line are plated at the same time in the first plating.

8. The method as claimed in claim 6 , wherein the first plating further comprises forming at least one second signal line.

9. The method as claimed in claim 6 , wherein in the first plating, the at least one ground line, the at least one power line and the at least one second signal line are coupled through a plating bar, so that the at least one ground line, the at least one power line and the at least one second signal line are plated at the same time in the first plating.

10. The method as claimed in claim 6 , further comprising a packaging process for manufacturing a plurality of elements, wherein the packaging process further comprises:
performing a plurality of wirings to respectively bond dies with the package units;
molding the printed circuit board with the dies; and
cutting the molded printed circuit board to separate the package units and separate the ground lines from the power lines.

Assignees

• Silicon Motion Inc

Inventors

• HUANG Shu-ying
• Chen Te-Wei
• Chen Hsiu-Yuan

Classifications

• H05K2203/1316

  Moulded encapsulation of mounted components · CPC title

• H05K2203/0723

  Electroplating, e.g. finish plating · CPC title

• H05K2203/072

  Electroless plating, e.g. finish plating or initial plating · CPC title

• H05K2201/09681

  Mesh conductors, e.g. as a ground plane · CPC title

• H05K3/242

  characterised by using temporary conductors on the printed circuit for electrically connecting areas which are to be electroplated · CPC title