Apparatus and method for remotely testing memory-mapped devices of a system-on-chip via an ethernet interface
US-2016330094-A1 · Nov 10, 2016 · US
US9989591B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9989591-B2 |
| Application number | US-201514687259-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 15, 2015 |
| Priority date | Apr 15, 2014 |
| Publication date | Jun 5, 2018 |
| Grant date | Jun 5, 2018 |
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Official abstract text for this publication.
Method and apparatus for performing Pattern-Controlled tests on an automatic test equipment (ATE). The ATE includes a diagnostic instrument and a control device. An application programming interface (API) is installed in the control device and operates to interact with a test program and thereby automatically controls the diagnostic instrument to perform a test. The test program is coded in a high-level programming language and defines a plurality of operation events for the test based on user input. The API identifies the operational events and determines respective operational types associated therewith. Events of an operational type are assigned to a respective pattern label. The pattern labels are then aggregated into a pattern burst which is downloaded to the diagnostic instrument.
Opening claim text (preview).
What is claimed is: 1. A computer implemented testing method of testing an electronic device with an automatic testing equipment (ATE), said method comprising: accessing a test program coded in a high level programming language; identifying a plurality of operational events defined in said test program; based on said test program, classifying said plurality of operational events into one or more operational types; assigning a pattern label to each operational type of said one or more operational types; inserting each operational event of said plurality of operational events to a corresponding pattern label; and aggregating pattern labels into a pattern burst, wherein said pattern burst is used for testing said electronic device using said ATE. 2. The computer implemented testing method according to claim 1 , wherein said one or more operational types are selected from a group consisting of a direct-current (DC) operation type, an analog operation type, a digital operation type, an radio frequency (RF) operation type, and a protocol operation type. 3. The computer implemented testing method according to claim 1 , wherein said high level language is selected from a group consisting of: C, C++, Java, .NET and a combination thereof. 4. The computer implemented testing method according to claim 1 further comprising supplying the pattern burst to a diagnostic instrument in said ATE, wherein said diagnostic instrument is configured to generate stimulus signals for application to a device under-test (DUT) based on said pattern burst. 5. The computer implemented testing method according to claim 1 , wherein said assigning and said inserting are performed subsequent to said classifying. 6. The computer implemented testing method according to claim 1 , wherein said assigning and said inserting are performed in parallel. 7. The computer implemented testing method according to claim 1 , wherein said test program is configured to interact with a set of application programming interfaces (APIs). 8. The computer implemented testing method according to claim 7 , wherein said set of APIs are stored in a test control device coupled to said ATE. 9. A non-transitory computer-readable medium storing instructions thereon that implement an application programming interface (API) for controlling an automatic testing equipment (ATE), wherein the API, when invoked in a software application executed on a processor, is configured to perform a method of: accessing said software application configured to control said ATE to perform a test process, wherein said software application is coded in a high level language; identifying a plurality of operational events defined in said test process based on said software application; determining respective operational types of said plurality of events; generating pattern labels for said respective operational types; associating each of said plurality of operational events to a corresponding pattern label; and generating a pattern burst comprising said pattern labels, wherein said pattern burst is for testing an electronic device using said ATE. 10. The non-transitory computer-readable medium of claim 9 , wherein said respective operational types are selected from a group consisting of a direct-current (DC) operation type; an analog operation type, a digital operation type, an radio frequency (RF) operation type, and a protocol operation type. 11. The non-transitory computer-readable medium of claim 9 , wherein said high level language is selected from a group consisting of: C, C++, Java, .NET and a combination thereof. 12. The non-transitory computer-readable medium of claim 9 , wherein said method further comprises supplying the pattern burst to a diagnostic instrument in said ATE, wherein said diagnostic instrument is configured to generate stimulus signals to said electronic device based on said pattern burst. 13. The non-transitory computer-readable medium of claim 9 , wherein said generating said pattern labels and said associating are performed subsequent to said determining. 14. The non-transitory computer-readable medium of claim 9 , wherein said generating said pattern labels and said associating are performed in parallel. 15. The non-transitory computer-readable medium of claim 9 , wherein said API is stored in a pattern control device coupled to said ATE. 16. An automatic testing equipment comprising: a diagnostic instrument; a pattern controller coupled to said diagnostic instrument and configured to automatically control said diagnostic instrument, wherein said pattern controller comprises: a processor; memory coupled to said processor and comprising instructions, when executed by said processor, implement an application programming interface (API) for controlling said diagnostic instrument, wherein the API, when invoked in a software application executed on a processor, is configured to perform a method of: accessing said software application configured to control said ATE to perform a test process, wherein said software application is coded in a high level language; identifying a plurality of operational events defined in said test process based on said software application; determining respective operational types of said plurality of events; generating pattern labels for said respective operational types; associating each of said plurality of operational events to a corresponding pattern label; and generating a pattern burst comprising said pattern labels, wherein said pattern burst is used for testing an electronic device using said ATE. 17. The system according to claim 16 , wherein said respective operational types are selected from a group consisting of a direct-current (DC) operation type, an analog operation type, a digital operation type, an radio frequency (RE) operation type, and a protocol operation type. 18. The system according to claim 16 , wherein said method further comprises supplying the pattern burst to a diagnostic instrument in said ATE, wherein said diagnostic instrument is configured to generate stimulus signals to a device under-test (DUT) based on said pattern burst. 19. The system according to claim 16 , wherein said generating said pattern labels and said associating are performed subsequent to said determining. 20. The system according to claim 16 , wherein said generating said pattern labels and said associating are performed in parallel.
Modular tester, e.g. controlling and coordinating instruments in a bus based architecture · CPC title
Testing of logic operation, e.g. by logic analysers · CPC title
Automated test systems [ATE]; using microprocessors or computers (G01R31/317 takes precedence; ATE for detection of defective computer hardware G06F11/2736) · CPC title
Tester set-up, e.g. configuring the tester to the device under test [DUT], down loading test patterns · CPC title
using a dedicated service processor for test · CPC title
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