Latch Performance Detection Method, Device and Electronic Device
US-2024170092-A1 · May 23, 2024 · US
Test system
US9484116B1 · US · B1
| Field | Value |
|---|---|
| Publication number | US-9484116-B1 |
| Application number | US-201514827743-A |
| Country | US |
| Kind code | B1 |
| Filing date | Aug 17, 2015 |
| Priority date | Aug 17, 2015 |
| Publication date | Nov 1, 2016 |
| Grant date | Nov 1, 2016 |
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Abstract
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At least one general-purpose server is connected to a PE module via Ethernet (trademark). A control unit of the PE module controls a PE circuit and multiple fail memory in a real-time manner, temporarily stores fail information stored in the multiple fail memory, performs data processing on the fail information, and transfers the fail information thus processed to the general-purpose server. Each general-purpose server is controlled according to a computer program so as to perform redundancy analysis for a DUT based on the data received from the PE module.
First claim
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What is claimed is: 1. A test system comprising: a pin electronics module; and at least one general-purpose server each connected to the pin electronics module via Ethernet, wherein the pin electronics module comprises: a pin electronics circuit that acquires fail information with respect to a device under test; a plurality of fail memories that store the fail information; and a control unit that controls the pin electronics circuit and the plurality of fail memories in a…
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Frequently asked questions
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- What does patent US9484116B1 cover?
- At least one general-purpose server is connected to a PE module via Ethernet (trademark). A control unit of the PE module controls a PE circuit and multiple fail memory in a real-time manner, temporarily stores fail information stored in the multiple fail memory, performs data processing on the fail information, and transfers the fail information thus processed to the general-purpose server. Ea…
- Who is the assignee on this patent?
- Advantest Corp
- What technology area does this patent fall under?
- Primary CPC classification G11C29/56. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Nov 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).