High Q quartz-based MEMS resonators and methods of fabricating same

Patent metadata

Field	Value
Publication number	US-9985198-B1
Application number	US-201414286419-A
Country	US
Kind code	B1
Filing date	May 23, 2014
Priority date	Jun 15, 2010
Publication date	May 29, 2018
Grant date	May 29, 2018

Abstract

High-yield fabrication methods are provided for making quartz resonators having thicknesses ranging from one micrometer to several hundred micrometers and thus covering the frequency range from HF to UHF. Plasma dry etching is used to form arbitrary resonator geometries. The quartz resonator structure and the through-quartz vias are formed concurrently. The method includes bonding a quartz device wafer to a quartz handle wafer with a temporary adhesive. Mesa structures formed by plasma dry etching enable the resonators to achieve high-Q operation with energy trapping/mode confinement. A thermo-compression bond integrates the quartz resonators to a host wafer (e.g., an oscillator ASIC) to form oscillators. Silicon cap wafers are bonded over the resonators to the ASIC to provide wafer scale hermetic encapsulation of the quartz oscillators.

First claim

We claim:

1. A method of fabricating a resonator comprising:
providing a first quartz substrate having a desired thickness;
providing a first mesa located on a first major surface of said first quartz substrate, said first mesa being defined by forming a first groove into said first side so that said first mesa is at least partially surrounded by material having the same thickness relative to said first groove as said first mesa but positioned laterally of said first mesa and separated therefrom by said first groove;
forming a metallic etch stop on a portion of the first major surface of said first quartz substrate;
forming a first metallic electrode on said first mesa of said first quartz substrate, in contact with said metallic etch stop and filling at least a portion of said first groove;
adhesively attaching, using a temporary adhesive, said first major surface of said first quartz substrate and said metallic etch stop formed thereon to a second quartz substrate;
applying a metallic etch mask on a second major surface of said first quartz substrate, said metallic etch mask including a first opening;
directing a dry etchant through said first opening to thereby dry etch a via having a vertical sidewall through said first quartz substrate to said etch stop;
conformally depositing a metal electrode on a second major surface of said first quartz substrate, on the vertical sidewall of said via and on a bottom of said via thereby making ohmic contact with said metallic etch stop;
bonding said metal electrode formed on said second major surface of said first quartz substrate to a pad formed on a substrate that bears oscillator drive circuitry; and
dissolving said temporary adhesive to thereby release said second quartz substrate from said first major surface of said first quartz substrate and said metallic etch stop.

2. The method of claim 1 , wherein said first electrode on said first major surface of said first quartz substrate comprises layers of Cr and Au with the Cr layer is disposed closer to said first quartz substrate.

3. The method of claim 1 , wherein the step of directing an etchant further comprises defining a perimeter shape of said first quartz substrate.

4. The method of claim 3 , wherein said etchant comprises a fluorine-based plasma.

5. The method of claim 1 , wherein a plurality of resonators are formed simultaneously from a single first quartz substrate, the first quartz substrate having a plurality of metallic etch stops, each said etch stop being each formed on a portion of the first major surface of the first quartz substrate, said portion aligning with each one of said resonators for each one of said metallic etch stops.

6. The method of claim 1 , further including providing a second mesa located on the second major surface of said first quartz substrate, said second mesa being defined by forming a second groove into said second side so that said second mesa is at least partially surrounded by material having the same thickness relative to said second groove as said second mesa but positioned laterally of said second mesa and separated therefrom by said first groove, and forming a second metallic electrode on the second mesa.

7. The method of claim 1 , wherein said first quartz substrate and said second quartz substrate are crystalline quartz.

8. The method of claim 1 , wherein said first quartz substrate and said second quartz substrate are crystalline quartz and share a common crystal orientation.

9. The method of claim 1 , wherein prior to the step of forming a metallic etch stop, the method further comprises dry etching the first mesa on said first major surface of said first quartz substrate, the first mesa having a central plateau region and having at least one vertical sidewall defining an exterior edge of the plateau region of said first mesa.

10. The method of claim 9 , wherein prior to the step of dry etching a via through said first quartz substrate to said etch stop, the method further comprises dry etching a second mesa in said second major surface of said first quartz substrate, the second mesa having a central plateau region and having at least one vertical sidewall defining an exterior edge of the plateau region of said second mesa.

11. The method of claim 10 , wherein said first mesa is directly across said quartz wafer from said second mesa.

12. The method of claim 1 , wherein the temporary adhesive is a petroleum-based wax.

13. The method of claim 1 , wherein said etch stop comprises layers of Cr and Au with the Cr layer disposed closer to said first quartz substrate.

14. The method of claim 1 , further comprising attaching a silicon cap to said substrate that bears oscillator drive circuitry, wherein said silicon cap comprises a cavity, wherein said cavity is facing said substrate that bears oscillator drive circuitry such that a chamber is produced, wherein said first quartz substrate is enclosed within said chamber.

15. The method of claim 14 , wherein said substrate that bears oscillator drive circuitry includes a capping seal ring comprising a first metal stack selected from the group consisting of Cr/Pt/Au and Cr/Pt/Au/In, wherein said silicon cap comprises a second metal stack comprising Cr/Pt/Au/In, wherein said first metal stack is bonded to said second metal stack.

16. The method of claim 1 , wherein the temporary adhesive has a thickness sufficient to accommodate a thickness of said metallic etch stop.

17. An apparatus, comprising:
a silicon application-specific integrated circuit (ASIC) wafer comprising a first bond pad and a second bond pad;
a quartz resonator comprising a first side, a second side opposite said first side, a via, a first electrode, a second electrode and a third electrode, wherein said first electrode is on said first side and overlaps said via, wherein said second electrode is on said second side, extends into said via and is in electrical contact with said first electrode, wherein said second electrode is in electrical contact with said first bond pad, and wherein said third electrode is on said second side and is in electrical contact with said second bond pad; and
a first mesa located on said first side and a second mesa located on said second side, the first mesa being defined by a first pair of vertical sidewalls in said quartz resonator which define a groove in said first side, the second mesa being defined by a second pair of vertical sidewalls in said quartz resonator which define a groove in said second side, the first and second pairs of vertical sidewalls vertically aligning with each other on opposing sides of said quartz resonator, the groove in said first side being at least partially filled by said first electrode and wherein said ASIC includes a capping seal ring comprising a first metal stack selected from the group consisting of Cr/Pt/Au and Cr/Pt/Au/In, wherein a silicon cap comprises a second metal stack comprising Cr/Pt/Au/In, and wherein said first metal stack is bonded to said second metal stack.

18. The apparatus of claim 17 , wherein said silicon cap is attached to said ASIC, wherein said silicon cap comprising a cavity, wherein said cavity is facing said ASIC such that a chamber is produced, wherein said resonator is enclosed within said chamber.

19. An apparatus, comprising:
a quartz resonator body comprising a first side, a second side and a via;
a silicon ASIC wafer comprising an electrically conductive first bond pad and an electrically conductive second bond pad;
a first electrode overlapping said via on said first side;
a contiguo

Assignees

• Hrl Lab Llc
• Hrl Lab Llc

Inventors

• Chang David T
• Stratton Frederic P
• Nguyen Hung
• Kubena Randall L

Classifications

• H01L41/29

  Electricity · mapped topic

• H01L41/0475

  Electricity · mapped topic

• H01L41/23

  Electricity · mapped topic

• H01L41/332

  Electricity · mapped topic

• H01L41/053

  Electricity · mapped topic