Encapsulated nanostructures and method for fabricating

Patent metadata

Field	Value
Publication number	US-9985101-B2
Application number	US-201615335605-A
Country	US
Kind code	B2
Filing date	Oct 27, 2016
Priority date	Oct 30, 2015
Publication date	May 29, 2018
Grant date	May 29, 2018

Abstract

Various nanostructures, including silicon nanowires and encapsulated silicon nanoislands, and methods of making the nanostructures are provided. The methods can include providing a fin structure extending above a substrate, wherein the fin structure has at least one silicon layer and at least two silicon:germanium alloy (SiGe) layers that define sidewalls of the fin structure; and annealing the fin structure in oxygen to form a silicon nanowire assembly. The silicon nanowire assembly can include a silicon nanowire, a SiGe matrix surrounding the silicon nanowire; and a silicon oxide layer disposed on the SiGe matrix. The annealing can be, for example, at a temperature between 800° C. and 1000° C. for five minutes to sixty minutes. The silicon nanowire can have a long axis extending along the fin axis, with perpendicular first and second dimensions extending less than 50 nm along directions perpendicular to the fin axis.

First claim

We claim:

1. A method of forming a nanowire, the method comprising:
providing a fin structure extending above a substrate plane of a substrate, wherein the fin structure comprises at least three layers, wherein the fin structure comprises at least one silicon layer and at least two silicon:germanium alloy (SiGe) layers, wherein the at least one silicon layer and the at least two SiGe layers define sidewalls of the fin structure; and
annealing the fin structure in an oxygen ambient, wherein a silicon nanowire assembly is formed, wherein the silicon nanowire assembly comprises:
a silicon nanowire formed from the at least one silicon layer,
a SiGe matrix surrounding the silicon nanowire; and
a silicon oxide layer disposed on the SiGe matrix.

2. The method of claim 1 , wherein the annealing comprises annealing the fin structure in an oxygen ambient at a temperature between 800° C. and 1000° C.

3. The method of claim 1 , wherein the annealing comprises annealing the fin structure for five minutes to sixty minutes.

4. The method of claim 1 , wherein the fin structure comprises at least three SiGe layers and at least two silicon layers, and
wherein the silicon nanowire assembly comprises at least two silicon nanowires.

5. The method of claim 1 , wherein the at least one free standing silicon nanowire is defect-free.

6. The method of claim 1 , wherein the fin structure comprises a fin axis extending parallel to a plane of the substrate,
wherein the fin structure comprises a fin width of 60 nm or less, and
wherein the silicon nanowire has a first dimension extending less than 50 nm along a first direction perpendicular to the fin axis, and a second dimension extending less than 50 nm along a second direction perpendicular to the first direction and the fin axis.

7. The method of claim 1 , further comprising removing the silicon oxide layer and selectively removing the SiGe matrix, wherein at least one free standing silicon nanowire having an exposed outer surface is formed.

8. The method of claim 7 , wherein the at least one free standing silicon nanowire is connected to a source/drain region formed on the substrate, the method further comprising forming a gate around the exposed outer surface, wherein the gate encapsulates the at least one free standing silicon nanowire.

9. The method of claim 1 , wherein the at least two SiGe layers comprise a first germanium concentration of 30% or less, and
wherein the SiGe matrix comprises a second germanium concentration of greater than 30%.

10. The method of claim 9 , wherein the second germanium concentration is greater than 50%.

11. The method of claim 10 , further comprising removing the silicon oxide layer and selectively removing the SiGe matrix, wherein at least one free standing silicon nanowire having an exposed outer surface is formed.

12. A nanostructure, comprising:
a substrate;
a fin structure disposed on the substrate, the fin structure having a fin axis, wherein the fin structure comprises:
at least one silicon nanowire having a long axis extending along the fin axis, the at least one silicon nanowire comprising monocrystalline silicon; and
a matrix material surrounding the nanowire, the matrix material comprising a monocrystalline silicon:germanium alloy (SiGe),

wherein the at least one silicon nanowire has a first dimension extending less than 50 nm along a first direction perpendicular to the fin axis, and a second dimension extending less than 50 nm along a second direction perpendicular to the first direction and the fin axis,
wherein the fin structure has an outer surface comprising SiGe material, and
wherein the at least one silicon nanowire does not extend on the outer surface of the fin structure.

13. The nanostructure of claim 12 , wherein the at least one silicon nanowire is a strained silicon nanowire.

14. The nanostructure of claim 12 , the at least one silicon nanowire comprising a plurality of silicon nanowires, wherein the matrix material surrounds the plurality of silicon nanowires.

15. The nanostructure of claim 12 , wherein the fin axis extends parallel to a plane of the substrate,
wherein the at least one silicon nanowire has a first dimension extending less than 20 nm along a first direction perpendicular to the fin axis, and a second dimension extending less than 20 nm along a second direction perpendicular to the first direction and the fin axis.

16. The nanostructure of claim 12 , wherein the at least one silicon nanowire is defect-free.

17. The nanostructure of claim 12 , wherein the at least one silicon nanowire and silicon:germanium alloy (SiGe) comprise a unitary monocrystalline structure.

18. The nanostructure of claim 17 , wherein the silicon:germanium alloy (SiGe) comprises a germanium concentration of greater than 50%.

19. A method of forming an encapsulated nanostructure, the method comprising:
forming a multilayer structure extending above a substrate plane of a substrate, wherein the multilayer structure comprises at least three layers, wherein the multilayer structure comprises at least one silicon layer and at least two silicon:germanium alloy (SiGe) layers, wherein the at least one silicon layer and the at least two SiGe layers define a plurality of sides of the multilayer structure; and
annealing the multilayer structure in an oxygen ambient, wherein a silicon nanoisland assembly is formed, wherein the silicon nanoisland assembly comprises:
an outer surface having a top surface and a plurality of sides,
a silicon nanoisland formed from the at least one silicon layer and disposed in an interior of the silicon nanoisland assembly;
a SiGe matrix surrounding the silicon nanoisland; and
a silicon oxide layer disposed on the SiGe matrix wherein the outer surface comprises silicon oxide.

20. The method of claim 19 , wherein the at least two SiGe layers comprise a first germanium concentration, and wherein the SiGe matrix comprises a second Ge concentration greater than the first Ge concentration.

Assignees

• Univ Florida
• Varian Semiconductor Equipment Ass Inc

Inventors

• Hatem Christopher
• Jones Kevin S
• Brewer William M

Classifications

• H10P95/90

  Thermal treatments, e.g. annealing or sintering · CPC title

• H10P14/6308

  of Group IV semiconductors · CPC title

• H10P14/3462

  Nanowires · CPC title

• H10P14/3411

  Silicon, silicon germanium or germanium · CPC title

• B82Y10/00

  Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic · CPC title