Electronic component and method for manufacturing electronic component

Patent metadata

Field	Value
Publication number	US-9984808-B2
Application number	US-201715433259-A
Country	US
Kind code	B2
Filing date	Feb 15, 2017
Priority date	Apr 5, 2016
Publication date	May 29, 2018
Grant date	May 29, 2018

Abstract

An electronic component includes a substantially helix-shaped inductor including inductive conductor layers on insulator layers including a first inductive conductor layer and a second inductive conductor layer adjacent to the first inductive conductor layer on the upper layer side. Each of the first and second inductive conductor layers has a contact portion and a linear portion. The contact portion is, when viewed in the laminating direction, overlapped by an inductive conductor layer adjacent thereto on the lower or upper layer side. The linear portion is not overlapped by inductive conductor layers adjacent thereto on the lower and upper layer sides. The lower surface of the linear portion of the second inductive conductor layer is positioned higher than that of the first inductive conductor layer, and is positioned lower than the upper surface of the linear portion of the first inductive conductor layer.

First claim

What is claimed is:

1. An electronic component comprising:
a multilayer body that has a configuration in which a plurality of insulator layers are laminated from a lower layer side to an upper layer side; and
an inductor including a plurality of inductive conductor layers that are disposed on the plurality of insulator layers and electrically connected to one another in series, the inductor being substantially helix-shaped in such a manner as to extend helically from the lower layer side to the upper layer side,
wherein the plurality of inductive conductor layers include a first inductive conductor layer and a second inductive conductor layer adjacent to the first inductive conductor layer on the upper layer side,
wherein each of the first inductive conductor layer and the second inductive conductor layer has a contact portion and a linear portion, the contact portion being, when viewed in the laminating direction, overlapped by an inductive conductor layer adjacent thereto on the lower layer side or the upper layer side among the plurality of inductive conductor layers, the linear portion being not overlapped by inductive conductor layers adjacent thereto on the lower layer side and the upper layer side among the plurality of inductive conductor layers, and
wherein a lower surface of the linear portion of the second inductive conductor layer is positioned higher than a lower surface of the linear portion of the first inductive conductor layer, and is positioned lower than an upper surface of the linear portion of the first inductive conductor layer.

2. The electronic component according to claim 1 ,
wherein an upper surface of the contact portion of the first inductive conductor layer is directly in contact with a lower surface of the contact portion of the second inductive conductor layer.

3. The electronic component according to claim 1 ,
wherein each of a length of the first inductive conductor layer and a length of the second inductive conductor layer is less than a length of one turn of the inductor.

4. The electronic component according to claim 1 ,
wherein a sum of a length of the first inductive conductor layer and a length of the second inductive conductor layer is less than a length of one turn of the inductor.

5. The electronic component according to claim 1 ,
wherein the second inductive conductor layer and an inductive conductor layer adjacent to the second inductive conductor layer on the upper layer side satisfy a relationship identical to a relationship between the first inductive conductor layer and the second inductive conductor layer.

6. The electronic component according to claim 1 ,
wherein two adjacent layers of the plurality of inductive conductor layers satisfy a relationship identical to a relationship between the first inductive conductor layer and the second inductive conductor layer.

7. The electronic component according to claim 1 ,
wherein a mounting surface of the electronic component is parallel to the laminating direction.

8. The electronic component according to claim 1 ,
wherein the plurality of insulator layers include a first insulator layer and a second insulator layer,
wherein the first inductive conductor layer is disposed on the first insulator layer,
wherein the second insulator layer is disposed on the first insulator layer,
wherein the second inductive conductor layer is disposed on the second insulator layer, and
wherein a thickness of the second insulator layer is less than a thickness of the first inductive conductor layer.

9. The electronic component according to claim 8 ,
wherein the plurality of insulator layers further include a third insulator layer,
wherein the third insulator layer is disposed on the second insulator layer,
wherein a thickness of the third insulator layer is less than a thickness of the second inductive conductor layer, and
wherein a sum of the thickness of the second insulator layer and the thickness of the third insulator layer is more than the thickness of the first inductive conductor layer.

10. The electronic component of claim 1 , including:
a first insulator layer;
forming the first inductive conductor layer on the first insulator layer, the first inductive conductor layer extending linearly from a first end portion to a second end portion;
forming a second insulator layer on the first insulator layer, the second insulator layer having a thickness less than a thickness of the first inductive conductor layer; and
forming the contact portion of the second inductive conductor layer above the second end portion of the first inductive conductor layer and forming the linear portion of the second inductive conductor layer on the second insulator layer in such a manner that the second inductive conductor layer extends linearly from a third end portion formed above the second end portion of the first inductive conductor layer to a fourth end portion on the second insulator layer.

11. The electronic component of claim 10 ,
wherein each of the first inductive conductor layer and the second inductive conductor layer is less than one turn.

12. The electronic component of claim 10 ,
wherein a sum of the first inductive conductor layer and the second inductive conductor layer is less than one turn.

13. The electronic component of claim 10 , including:
forming a third insulator layer on the second insulator layer, the third insulator layer having a thickness less than a thickness of the second inductive conductor layer.

14. The electronic component of claim 13 , including:
forming a contact portion of a third inductive conductor layer above the fourth end portion of the second inductive conductor layer and forming a linear portion of the third inductive conductor layer on the third insulator layer in such a manner that the third inductive conductor layer extends linearly from a fifth end portion formed above the fourth end portion of the second inductive conductor layer to a sixth end portion on the third insulator layer.

15. The electronic component of claim 13 ,
wherein a sum of the thickness of the second insulator layer and the thickness of the third insulator layer is more than the thickness of the first inductive conductor layer.

Assignees

• Murata Manufacturing Co

Inventors

• Miyoshi Hiromi

Classifications

• H01F41/041 Primary

  Printed circuit coils (apparatus or processes for manufacturing printed circuits in general H05K3/00) · CPC title

• H01F2027/2809

  on stacked layers · CPC title

• H01F27/2804 Primary

  Printed windings · CPC title

• H01F27/292

  Surface mounted devices · CPC title

• H01F17/0013 Primary

  with stacked layers · CPC title