Substrate-less electronic component and the method to fabricate thereof

Patent metadata

Field	Value
Publication number	US-2016141102-A1
Application number	US-201514940171-A
Country	US
Kind code	A1
Filing date	Nov 13, 2015
Priority date	Nov 14, 2014
Publication date	May 19, 2016
Grant date	—

Abstract

An electronic component is disclosed, the electronic component comprising: a conductive structure, comprising a plurality of conductive layers separated by a plurality of insulating layers, wherein the plurality of conductive layers and the plurality of insulating layers are stacked in a vertical direction, wherein the plurality of conductive layers forms at least one coil, wherein each of the coil is formed along the vertical direction across said plurality of conductive layers, wherein the plurality of insulating layers are not supported by a substrate.

First claim

What is claimed is:

1 . An electronic component, comprising: a plurality of conductive layers separated by a plurality of insulating layers, wherein a coil comprising at least one winding turn is formed by the plurality of conductive layers, wherein each of the at least one winding turn is formed by electrically connecting a corresponding conductive pattern on each of the plurality of conductive layers, wherein the plurality of conductive layers and the plurality of insulating layers are not supported by a substrate.

2 . The electronic component of claim 1 , wherein said at least one winding turn is formed by a plurality of thin-film metal layers that are electrically connected, wherein a first thin-film metal layer is disposed on a first insulating layer, wherein a second insulating layer is disposed on a patterned area of the first thin-film metal layer and filled into a non-patterned area of the first thin-film metal layer, wherein the plurality of insulating layers separating said thin-film metal layers are not supported by a substrate.

3 . The electronic component of claim 1 , wherein the electronic component is an inductor, wherein an electrode having a portion disposed on the bottom surface of the inductor and electrically connected to the coil, wherein each winding turn of the coil is perpendicular to said portion of the electrode disposed on the bottom surface of the inductor.

4 . The electronic component of claim 1 , wherein the electronic component is an inductor, further comprising a first electrode, wherein an inner surface of the first electrode comprises at least one first recess for increasing the contact areas of the first electrode.

5 . The electronic component of claim 4 , further comprising a second electrode, wherein an inner surface of the second electrode comprises at least one second recess, wherein a first portion of the plurality of insulating layers is filled into said at least one first recess, and a second portion of the plurality of insulating layers is filled into said at least one second recess.

6 . The electronic component of claim 1 , wherein the electronic component is a choke or inductor.

7 . The electronic component of claim 1 , wherein the plurality of insulating layers comprise a top insulating layer, a plurality of median insulating layers and a bottom insulation layer, wherein the at least one coil is substantially disposed in the plurality of the median insulating layers.

8 . The electronic component of claim 7 , wherein the thickness of the top insulating layer is greater than that of each of the plurality of median insulating layers.

9 . The electronic component of claim 5 , wherein each of the insulating layer is a dielectric layer and each of the conductive layer is a metal layer, wherein each metal layer has a metal track formed between the first electrode and the second electrode; a plurality of vias disposed in the dielectric layer to electrically connect the metal tracks of the metal layers, wherein each of the first electrode and the second electrode is perpendicular to a corresponding metal track.

10 . The electronic component of claim 4 , wherein the inner surface of the first electrode has a first plurality of protrusions and the inner surface of the second electrode has a second plurality of protrusions alternating with the first plurality of protrusions from layer to layer.

11 . The electronic component of claim 9 , wherein said corresponding metal track is hook shaped metal track.

12 . The electronic component of claim 9 , wherein the first and second electrodes have different shapes from each other from layer to layer.

13 . The electronic component of claim 9 , wherein each of the first and second electrodes extends from a middle layer of the plurality of the conductive layers to the bottom layer of the plurality of the conductive layers.

14 . The electronic component of claim 9 , wherein each of the first and second electrodes extends from the top layer of the plurality of the conductive layers to the bottom layer of the plurality of the conductive layers.

15 . The electronic component of claim 1 , wherein a first conductive layer of the plurality of the conductive layers and a second conductive layer of the plurality of the conductive layers are separated by a first insulating layer, wherein a first metal track pattern on the first conductive layer and a second metal track on the second conductive layer have a same shape, wherein the first metal track and the second metal track are stacked on and electrically connected to each other through the first insulating layer.

16 . The electronic component of claim 15 , wherein said same shape of the first metal track on the first conductive layer and the second metal track on are aligned to each other.

17 . A method for forming an electronic component, the method comprising:
providing a substrate; forming a plurality of conductive layers separated and a plurality of insulating layers on the substrate, wherein the plurality of conductive layers are separated by the plurality of insulating layers, wherein a coil comprising at least one winding turn is formed by the plurality of conductive layers, wherein each of the at least one winding turn is formed by electrically connecting a corresponding conductive pattern on each of the plurality of conductive layers; and removing the substrate from the plurality of conductive layers and the plurality of insulating layers.

18 . The method of claim 17 , wherein the electronic component is made by a lithography process or a thin-film process.

19 . The method of claim 17 , further comprising disposing a buffer layer on the substrate, wherein the plurality of conductive layers and the plurality of are formed on the buffer layer; and removing the buffer layer after removing the substrate.

20 . The method of claim 17 , wherein said at least one winding turn is formed by a plurality of thin-film metal layers that are electrically connected, wherein a first thin-film metal layer is disposed on a first insulating layer, wherein a second insulating layer is disposed on a patterned area of the first thin-film metal layer and filled into a non-patterned area of the first thin-film metal layer, wherein the plurality of insulating layers separating said thin-film metal layers are not supported by a substrate.

Assignees

• Cyntec Co Ltd

Inventors

• Tseng Shih-Hsien
• Chou Chia Pei
• Chiang Yi-Ting
• Tsai Chang-Ming

Classifications

• H01F2027/2809

  on stacked layers · CPC title

• H01F41/042 Primary

  by thin film techniques · CPC title

• H01F27/2804

  Printed windings · CPC title

• H01F27/29

  Terminals; Tapping arrangements {for signal inductances} · CPC title

• H01F17/0013

  with stacked layers · CPC title