Multiple defect diagnosis method and machine readable media

US9983264B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9983264-B2
Application numberUS-201414519109-A
CountryUS
Kind codeB2
Filing dateOct 20, 2014
Priority dateJan 21, 2014
Publication dateMay 29, 2018
Grant dateMay 29, 2018

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Abstract

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A multiple defect diagnosis method includes: receiving a gate-level netlist of a chip, a plurality of test patterns and a plurality of test failure reports; deriving a plurality of seed nets from the gate-level netlist according to the plurality of test patterns and the plurality of test failure reports; utilizing a processor to compute similarity between the plurality of seed nets, and accordingly merging the plurality of seed nets to obtain a single seed net tree; and deriving at least one suspected seed net according to the single seed net tree.

First claim

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What is claimed is: 1. A multiple defect diagnosis method, comprising: receiving a gate-level netlist, a plurality of test patterns and a plurality of test failures of a chip; deriving a plurality of seed nets from the gate-level netlist according to the plurality of test failures and the plurality of test patterns; utilizing a processor to calculate similarities between the plurality of seed nets, to merge the plurality of seed nets accordingly to generate a single seed-net tree; and determining at least one suspected seed net from the plurality of seed nets according to the single seed-net tree, so as to narrow down a defect region of the chip to the at least one determined suspected seed net. 2. The multiple defect diagnosis method of claim 1 , wherein the step of deriving the plurality of seed nets from the gate-level netlist according to the plurality of test failures and the plurality of test patterns comprises: obtaining a plurality of erroneous output ports corresponding to the gate-level netlist according to the plurality of test failures, and tracing back from the plurality of erroneous output ports to derive a plurality of stuck-at faults; executing simulations for the plurality of stuck-at faults with respect to the plurality of test patterns, respectively, to generate a plurality of simulation failures, respectively; and deriving the plurality of seed nets from the plurality of stuck-at faults according to the plurality of simulation failures and the plurality of test failures. 3. The multiple defect diagnosis method of claim 1 , wherein the step of utilizing the processor to calculate the similarities between the plurality of seed nets comprises: executing simulations for the plurality of seed nets with respect to the plurality of test patterns, respectively, to generate a plurality of seed net simulation failures, respectively; and calculating the similarities between the plurality of seed nets according to the plurality of seed net simulation failures and the plurality of test failures. 4. The multiple defect diagnosis method of claim 1 , wherein the step of merging the plurality of seed nets accordingly to generate the single seed-net tree comprises: merging two of the plurality of seed nets with the highest similarity into a first node; and merging two of the unmerged seed nets and the first node with the highest similarity into a second node. 5. The multiple defect diagnosis method of claim 1 , wherein the step of determining the suspected seed net according to the single seed-net tree comprises: from the top down dividing the single seed-net tree into at least one cluster, wherein the cluster respectively comprises at least one seed net meeting a first specific condition; and deriving a suspected seed net from each cluster, wherein the suspected seed net is a seed net of a cluster, and corresponds to the most patterns which meets a second specific condition compared with other seed nets of the cluster. 6. The multiple defect diagnosis method of claim 5 , wherein all erroneous outputs of a seed net simulation failures of the seed net which meets the first specific condition are the same as erroneous outputs of the cluster, wherein the erroneous outputs of the cluster are a union of all erroneous outputs of respective seed net simulation failures of each seed net of the cluster. 7. The multiple defect diagnosis method of claim 5 , wherein erroneous outputs of the test failure result of the pattern corresponding to a cluster to which the seed net belongs are the same as erroneous outputs of the simulation failure result of the seed net corresponding to the cluster to which the seed net belongs, and the erroneous outputs of the cluster are a union of all erroneous outputs of respective seed net simulation failures of each seed net of the cluster. 8. A non-transitory machine readable medium storing a program code, wherein when executed by a processor, the program code enables the processor to perform a multiple defect diagnosis method, the method comprising: receiving a gate-level netlist, a plurality of test patterns and a plurality of test failures of a chip; deriving a plurality of seed nets from the gate-level netlist according to the plurality of test failures and the plurality of test patterns; utilizing a processor to calculate similarities between the plurality of seed nets, to merge the plurality of seed nets accordingly to generate a single seed-net tree; and determining at least one suspected seed net from the plurality of seed nets according to the single seed-net tree, so as to narrow down a defect region of the chip to the at least one determined suspected seed net. 9. The non-transitory machine readable medium of claim 8 , wherein the step of deriving the plurality of seed nets from the gate-level netlist according to the plurality of test failures and the plurality of test patterns comprises: obtaining a plurality of erroneous output ports corresponding to the gate-level netlist according to the plurality of test failures, and tracing back from the plurality of erroneous output ports to derive a plurality of stuck-at faults; executing simulations for the plurality of stuck-at faults with respect to the plurality of test patterns respectively, to generate a plurality of simulation failures respectively; and deriving the plurality of seed nets from the plurality of stuck-at faults according to the plurality of simulation failures and the plurality of test failures. 10. The non-transitory machine readable medium of claim 8 , wherein the step of utilizing the processor to calculate the similarities between the plurality of seed nets comprises: executing simulations for the plurality of seed nets with respect to the plurality of test patterns, respectively, to generate a plurality of seed net simulation failures, respectively; and calculating the similarities between the plurality of seed nets according to the plurality of seed net simulation failures and the plurality of test failures. 11. The non-transitory machine readable medium of claim 8 , wherein the step of merging the plurality of seed nets accordingly to generate the single seed-net tree comprises: merging two of the plurality of seed nets with the highest similarity into a first node; and merging two of the unmerged seed nets and the first node with the highest similarity into a second node. 12. The non-transitory machine readable medium of claim 8 , wherein the step of deriving determining the suspected seed net according to the single seed-net tree comprises: from the top down dividing the single seed-net tree into at least one cluster, wherein the cluster respectively comprises at least one seed net meeting a first specific condition; and deriving a suspected seed net from each cluster, wherein the suspected seed net is a seed net of a cluster, and corresponds to the most patterns which meets a second specific condition compared with other seed nets of the cluster. 13. The non-transitory machine readable medium of claim 12 , wherein all erroneous outputs of a seed net simulation failures of the seed net which meet the first specific condition are the same as erroneous outputs of the cluster, wherein the erroneous outputs of the cluster are a union of all erroneous outputs of respective seed net simulation failures of each seed net of the cluster. 14. The non-transitory machine readable medium of claim 12 , wherein erroneous outputs of the test failure result of the pattern corresponding to a cluster to which the seed net belongs are the same as erroneous outputs of the simulation failure result of the seed net corresp

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Classifications

  • Analysis of test coverage or failure detectability · CPC title

  • Simulation (computer simulation of digital circuits G06F30/3308) · CPC title

  • Methodologies therefor, e.g. algorithms, procedures · CPC title

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What does patent US9983264B2 cover?
A multiple defect diagnosis method includes: receiving a gate-level netlist of a chip, a plurality of test patterns and a plurality of test failure reports; deriving a plurality of seed nets from the gate-level netlist according to the plurality of test patterns and the plurality of test failure reports; utilizing a processor to compute similarity between the plurality of seed nets, and accordi…
Who is the assignee on this patent?
Realtek Semiconductor Corp
What technology area does this patent fall under?
Primary CPC classification G01R31/31835. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue May 29 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).