Correlation of test results and test coverage for an electronic device design

US9495489B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9495489-B2
Application numberUS-201414293289-A
CountryUS
Kind codeB2
Filing dateJun 2, 2014
Priority dateJun 2, 2014
Publication dateNov 15, 2016
Grant dateNov 15, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A device simulation system performs a set of tests by applying, for each test in the set, a corresponding test stimulus to a simulation of the electronic device. In response to each test stimulus, the simulation generates corresponding output information which the device simulation system compares to a specified expected outcome to identify a test result for that test stimulus. In addition, for each test stimulus, the device simulation system generates test coverage information indicating the particular configuration of the simulated electronic device that resulted from the stimulus. The device simulation system correlates the coverage information with the test results to identify correlation rules that indicate potential relationships between test results and configurations of the simulated device.

First claim

Opening claim text (preview).

What is claimed is: 1. A computer-implemented method comprising: applying first stimuli to a simulation of an electronic device design to generate a first plurality of test results; correlating the first plurality of test results with first coverage data to identify first correlation rules indicating correlations between the first plurality of test results and configurations of modules of the electronic device design, the first coverage data indicating states of a plurality of configuration variables representing configurations of modules of the electronic device design; modifying data files corresponding to the electronic device design based on the first correlation rules; and fabricating an electronic device based on the modified data files. 2. The method of claim 1 , further comprising: generating second stimuli based on the first correlation rules. 3. The method of claim 2 , further comprising: applying the second stimuli at the simulation of the electronic device design to generate a second plurality of test results based on the electronic device design. 4. The method of claim 3 , further comprising: correlating the second plurality of test results with second coverage data to identify second correlation rules for the electronic device design. 5. The method of claim 4 , further comprising: identifying a strength value based on a first correlation rule of the first correlation rules and a corresponding second correlation rule of the second correlation rules, the strength value indicative of a confidence associated with the first correlation rule and a number of simulations associated with the first correlation rule. 6. The method of claim 5 , further comprising: identifying the first correlation rule in an rules report based on the strength value. 7. The method of claim 4 , further comprising: iteratively generating stimuli and correlation rules based on the first correlation rules until a stop threshold is reached. 8. The method of claim 7 , wherein the stop threshold is based on a number of simulations of the electronic device design. 9. The method of claim 7 , wherein the stop threshold is based on an amount of time. 10. The method of claim 7 , wherein the stop threshold is based on a number of correlation rules being associated with a threshold confidence value. 11. A device simulation system, comprising: a stimulus generator to generate stimuli; a simulator to simulate operation of an electronic device based on the stimuli and an electronic device design to generate a test results; and a correlation and data mining module to correlate the test results with coverage data to identify correlation rules indicating correlations between the test results and configurations of modules of the electronic device design, the coverage data indicating states of a plurality of configuration variables representing configurations of modules of the electronic device design, and to modify data files corresponding to the electronic device design, and to fabricate an electronic device based on the modified data files. 12. A non-transitory computer-readable media tangibly embodying a set of executable instructions, the set of executable instructions to manipulate at least one processor to: apply first stimuli at a simulation of an electronic device design to generate a first plurality of test results and first coverage data; correlate the first plurality of test results with the first coverage data to identify first correlation rules indicating correlations between the first plurality of test results and configurations of modules of the electronic device design, the first coverage data indicating states of a plurality of configuration variables representing the configurations of modules of the electronic device design; modify data files corresponding to the electronic device design based on the first correlation rules; and fabricate an electronic device based on the modified data files. 13. The computer-readable media of claim 12 , further comprising instructions to: generate second stimuli based on the first correlation rules. 14. The computer-readable media of claim 13 , further comprising instructions to: apply the second stimuli to generate a second plurality of test results based on the electronic device design. 15. The computer-readable media of claim 14 , further comprising instructions to: correlate the second plurality of test results with second coverage data to identify second correlation rules for the electronic device design. 16. The computer-readable media of claim 15 , further comprising instructions to: identify a strength value based on a first correlation rule of the first correlation rules and a corresponding second correlation rule of the second correlation rules. 17. The computer-readable media of claim 16 , further comprising instructions to: identify the first correlation rule in a rules report based on the strength value. 18. The computer-readable media of claim 15 , further comprising instructions to: iteratively generate stimuli and correlation rules based on the first correlation rules until a stop threshold is reached. 19. The computer-readable media of claim 18 , wherein the stop threshold is based on a number of simulations of the electronic device design. 20. The computer-readable media of claim 18 , wherein the stop threshold is based on an amount of time.

Assignees

Inventors

Classifications

  • Design verification, e.g. functional simulation or model checking · CPC title

  • Design for testability [DFT], e.g. scan chain or built-in self-test [BIST] · CPC title

  • Circuit design · CPC title

  • Physics · mapped topic

  • Physics · mapped topic

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Frequently asked questions

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What does patent US9495489B2 cover?
A device simulation system performs a set of tests by applying, for each test in the set, a corresponding test stimulus to a simulation of the electronic device. In response to each test stimulus, the simulation generates corresponding output information which the device simulation system compares to a specified expected outcome to identify a test result for that test stimulus. In addition, for…
Who is the assignee on this patent?
Freescale Semiconductor Inc
What technology area does this patent fall under?
Primary CPC classification G06F17/5009. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Nov 15 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).