Control method and control circuit for switch in switching power supply

Patent metadata

Field	Value
Publication number	US-9979292-B2
Application number	US-201615349696-A
Country	US
Kind code	B2
Filing date	Nov 11, 2016
Priority date	Nov 27, 2015
Publication date	May 22, 2018
Grant date	May 22, 2018

Abstract

A control circuit for driving a power switch in a switching power supply can include: a start-up transistor having a drain coupled to a drain of the power switch, and a source coupled to a drain voltage detecting circuit; a gate voltage detecting circuit configured to detect a gate voltage of the power switch, to compare the gate voltage against a first threshold voltage, and to change an on drive current and an off drive current in response thereto; and the drain voltage detecting circuit being configured to detect a drain voltage of the power switch, to compare the drain voltage against a second threshold voltage, and to change the on drive current and the off drive current in response thereto.

First claim

What is claimed is:

1. A method of controlling a power switch in a switching power supply, the method comprising:
a) using, in a turn-on phase when a gate voltage of said power switch is larger than a first threshold voltage, a small on drive current to reduce a current change rate of said power switch during a commutation stage in said switching power supply;
b) detecting, in said turn-on phase, a drain voltage of said power switch, and adopting a large on drive current to accelerate a turn-on speed of said power switch when said drain voltage drops to a second threshold voltage;
c) controlling, in a turn-off phase when an off drive current rises to a large off drive current or switches to a large off drive current, said gate voltage to rapidly decrease to speed up a turning-off speed; and
d) detecting, in said turn-off phase when said drain voltage is larger than said second threshold voltage, said drain voltage of said power switch and adopting a small off drive current to reduce a current change rate and a drain voltage change rate of said power switch during said commutation stage.

2. The method of claim 1 , wherein said turn-on phase further comprises, when said gate voltage is smaller than said first threshold voltage:
a) detecting said gate voltage of said power switch in said switching power supply; and
b) adopting a large on drive current to shorten a delay time before turning on said power switch.

3. The method of claim 1 , wherein said turning-off phase further comprises said off drive current gradually rising from zero or said small off drive current being adopted to gradually reduce said gate voltage, so as to reduce said current change rate of said power switch during said commutation stage.

4. The method of claim 1 , wherein said turning-off phase further comprises, when said gate voltage is detected to be smaller than said first threshold voltage, adopting said large off drive current to shorten a delay time before turning off said power switch.

5. The method of claim 2 , wherein during said turning-on phase when said gate voltage rises to a Miller plateau voltage of said power switch, said small on drive current is adopted to reduce the drain voltage change rate of said power switch.

6. A control circuit for driving a power switch in a switching power supply, the control circuit comprising:
a) a start-up transistor having a drain coupled to a drain of said power switch, and a source coupled to a drain voltage detecting circuit;
b) a gate voltage detecting circuit configured to detect a gate voltage of said power switch, to compare said gate voltage against a first threshold voltage, and to change an on drive current and an off drive current in response thereto; and
c) said drain voltage detecting circuit being configured to detect a drain voltage of said power switch, to compare said drain voltage against a second threshold voltage, and to change said on drive current and said off drive current in response thereto, wherein a gate of said start-up transistor is set to a low level after said start-up transistor is turned on, a source voltage of said start-up transistor is clamped to a third threshold voltage when a drain voltage of said start-up transistor is larger than said third threshold voltage, and said source voltage and said drain voltage are maintained as consistent with each other when said drain voltage of said start-up transistor is smaller than said third threshold voltage.

7. A control circuit for driving a power switch in a switching power supply, the control circuit comprising:
a) a start-up transistor having a drain coupled to a drain of said power switch, and a source coupled to a drain voltage detecting circuit;
b) a gate voltage detecting circuit configured to detect a gate voltage of said power switch, to compare said gate voltage against a first threshold voltage, and to change an on drive current and an off drive current in response thereto;
c) said drain voltage detecting circuit being configured to detect a drain voltage of said power switch, to compare said drain voltage against a second threshold voltage, and to change said on drive current and said off drive current in response thereto;
d) an on current control circuit configured to receive a first gate detection signal from said gate voltage detecting circuit and a first drain detection signal from said drain voltage detecting circuit, and to generate an on current control signal;
e) an off current control circuit configured to receive a second gate detection signal from said gate voltage detecting circuit and a second drain detection signal from said drain voltage detecting circuit, and to generate an off current control signal; and
f) a driving circuit configured to receive said on current control signal and said off current control signal, and to generate an on drive current and an off drive current to said gate of said power switch in response thereto.

8. The control circuit of claim 6 , wherein:
a) said start-up transistor comprises an N-channel depletion mode transistor having an on voltage threshold value of a negative value; and
b) said third threshold voltage is equal to an absolute value of said on voltage threshold value of said N-channel depletion mode transistor.

9. The control circuit of claim 6 , wherein said drain voltage detecting circuit comprises a voltage divider circuit configured to:
a) receive said source voltage of said start-up transistor;
b) generate a divided voltage signal for comparison against a threshold characterization voltage indicative of said second threshold voltage; and
c) detect a magnitude of said drain voltage to obtain first and second drain detection signals.

10. The control circuit of claim 9 , wherein said drain voltage detecting circuit further comprises a third switch coupled in series with said voltage divider circuit, and being controlled according to a pulse-width modulation (PWM) signal and a drain detection signal.

11. The control circuit of claim 10 , wherein said drain voltage detecting circuit further comprises an inverter having an input terminal configured to receive said divided voltage signal for comparison against a voltage threshold value of said inverter, and to generate said drain detection signal at an output terminal of said inverter.

12. The control circuit of claim 11 , wherein said voltage threshold value of said inverter is used to represent said second threshold voltage.

Assignees

• Silergy Semiconductor Technology Hangzhou Ltd

Inventors

• Zhang Shaobin
• Li Le
• Hu Zhiliang
• Bai Yongjiang

Classifications

• H02M1/44

  Circuits or arrangements for compensating for electromagnetic interference in converters or inverters · CPC title

• H02M3/158 Primary

  including plural semiconductor devices as final control devices for a single load · CPC title

• H02M1/36

  Means for starting or stopping converters · CPC title

• H03K17/166 Primary

  Soft switching · CPC title

• H02M1/08 Primary

  Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters · CPC title