Silicon carbide semiconductor substrate, method for manufacturing silicon carbide semiconductor substrate, and method for manufacturing silicon carbide semiconductor device
US-2016181375-A1 · Jun 23, 2016 · US
US9978651B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9978651-B2 |
| Application number | US-201615552863-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 21, 2016 |
| Priority date | May 11, 2015 |
| Publication date | May 22, 2018 |
| Grant date | May 22, 2018 |
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A silicon carbide single crystal substrate includes a first main surface and a second main surface opposite to the first main surface. The first main surface includes a central square region and an outer square region. When viewed in a thickness direction, each of the central square region and the outer square region has a side having a length of 15 mm. The first main surface has a maximum diameter of not less than 100 mm. The silicon carbide single crystal substrate has a TTV of not more than 5 μm. A value obtained by dividing a LTIR in the central square region by a LTV in the central square region is not less than 0.8 and not more than 1.2. A value obtained by dividing a LTV in the outer square region by the LTV in the central square region is not less than 1 and not more than 3.
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The invention claimed is: 1. A silicon carbide single crystal substrate comprising a first main surface and a second main surface opposite to the first main surface, the first main surface including a central square region surrounded by a square having a center corresponding to an intersection between the first main surface and a straight line that passes through a center of gravity of the silicon carbide single crystal substrate and that is parallel to a thickness direction of the silicon carbide single crystal substrate, and an outer square region surrounded by a square that has a side parallel to a straight line perpendicular to a straight line connecting the intersection to a certain position on an outer edge of the first main surface and that has a center corresponding to a position separated away by 10.5 mm from the certain position toward the intersection, when viewed in the thickness direction, each of the central square region and the outer square region having a side having a length of 15 mm, the first main surface having a maximum diameter of not less than 100 mm, the silicon carbide single crystal substrate having a TTV of not more than 5 μm, a value obtained by dividing a LTIR in the central square region by a LTV in the central square region being not less than 0.8 and not more than 1.2, a value obtained by dividing a LTV in the outer square region by the LTV in the central square region being not less than 1 and not more than 3. 2. The silicon carbide single crystal substrate according to claim 1 , wherein the maximum diameter is not less than 150 mm. 3. The silicon carbide single crystal substrate according to claim 2 , wherein the maximum diameter is not less than 200 mm. 4. The silicon carbide single crystal substrate according to claim 1 , wherein a flaw having a depth of not less than 0.5 nm in the thickness direction is formed in the first main surface, and the flaw has an area density of not more than 0.085/cm 2 . 5. The silicon carbide single crystal substrate according to claim 1 , wherein a value obtained by dividing a LTIR in the outer square region by the LTV in the outer square region is not less than 0.8 and not more than 1.2. 6. A silicon carbide semiconductor device comprising the silicon carbide single crystal substrate recited in claim 1 . 7. A method for manufacturing a silicon carbide semiconductor device, the method comprising: preparing the silicon carbide single crystal substrate recited in claim 1 ; and processing the silicon carbide single crystal substrate.
by grinding or lapping · CPC title
Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title
into semiconductor materials, e.g. for doping · CPC title
by polishing · CPC title
Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography · CPC title
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