Integrated circuit implementing standard cells with metal layer segments extending out of cell boundary

Patent metadata

Field	Value
Publication number	US-9977854-B2
Application number	US-201615207691-A
Country	US
Kind code	B2
Filing date	Jul 12, 2016
Priority date	Jul 12, 2016
Publication date	May 22, 2018
Grant date	May 22, 2018

Abstract

A computer-implemented method of fabricating an integrated circuit structure includes selecting a first cell from a standard cell library, the first cell having a cell boundary and comprising a metal segment at a first metal track at a metal layer, the metal segment extending along a direction and terminating a specified distance beyond a first edge of the cell boundary. The method further includes placing the first cell at a first location of a physical layout for the integrated circuit structure. The method also includes selecting a second cell from the standard cell library and placing the second cell at a second location of the physical layout such that a second edge of a cell boundary of the second cell abuts the first edge of the cell boundary of the first cell, and wherein the metal segment extends into a metal track at the metal layer of the second cell.

First claim

What is claimed is:

1. An integrated circuit structure comprising:
a first cell extending along orthogonal first and second directions of a semiconductor substrate and having a cell boundary, the first cell comprising:
a first metal segment at a first metal track of an M 1 metal layer, the first metal segment extending along the first direction and terminating a specified first distance beyond a first edge of the cell boundary; and
a pin extending outside of the cell boundary of the first cell and coupled to the first metal segment.

2. The integrated circuit structure of claim 1 , wherein the first cell further comprises:
a second metal segment at a second metal track at the M 1 metal layer, the second metal segment extending along the first direction and terminating at least a specified second distance before the first edge.

3. The integrated circuit structure of claim 2 , wherein the first distance and the second distance are substantially equal.

4. The integrated circuit structure of claim 2 , wherein:
the first metal segment terminates at least the second distance before a second edge of the cell boundary, the second edge opposite the first edge.

5. The integrated circuit structure of claim 4 , wherein:
the second metal segment terminates at least the specified second distance before the second edge of the cell boundary.

6. The integrated circuit structure of claim 5 , wherein the first distance and the second distance are substantially equal.

7. The integrated circuit structure of claim 1 , further comprising:
a second cell extending along the first and second directions and having a cell boundary with a second edge adjacent to the first edge of the cell boundary of the first cell; and
wherein the first metal segment extends into a first metal track of the second cell at the M 1 metal layer.

8. The integrated circuit structure of claim 7 , wherein the second cell further comprises:
a second metal segment at a second metal track at the M 1 metal layer, the second metal segment extending along the first direction and terminating the specified first distance beyond the second edge; and
wherein the second metal segment extends into a second metal track of the first cell at the M 1 metal layer.

9. The integrated circuit structure of claim 7 , wherein:
a remaining portion of the first metal track of the first cell is devoid of metal at the metal layer.

10. The integrated circuit structure of claim 7 , wherein:
a remaining portion of the first metal track of the second cell comprises stub routing at the M 1 metal layer.

11. A non-transitory computer readable medium embodying a set of executable instructions for fabricating an integrated circuit structure, the set of executable instructions to:
build an integrated circuit structure by extending a cell boundary of a first cell along orthogonal first and second directions and forming a first metal segment at a first metal track at a first metal layer, the first metal segment extending along a first direction and terminating a specified first distance beyond a first edge of the cell boundary; and coupling a pin of the first metal layer outside of the cell boundary of the first cell to the first metal segment.

12. The non-transitory computer readable medium of claim 11 , the set of executable instructions further to:
form a second metal segment at a second metal track at the first metal layer, the second metal segment extending along the first direction and terminating a specified second distance before the first edge.

13. The non-transitory computer readable medium of claim 12 , wherein:
the first metal segment terminates the second distance before a second edge of the cell boundary, the second edge opposite the first edge.

14. The non-transitory computer readable medium of claim 13 , wherein:
the second metal segment terminates the specified second distance before the second edge of the cell boundary.

15. The non-transitory computer readable medium of claim 14 , wherein the first distance and the second distance are substantially equal.

16. The non-transitory computer readable medium of claim 11 , the set of executable instructions further to:
abut a second edge of a cell boundary of a second cell with the first edge of the cell boundary of the first cell; and
wherein the first metal segment extends into a first metal track of a second cell at the first metal layer.

17. The non-transitory computer readable medium of claim 16 , wherein:
the second cell comprises a second metal segment at a second metal track at the first metal layer, the second metal segment extending along the first direction and terminating the specified first distance beyond the second edge; and
the second metal segment extends into a second metal track of the first cell at the first metal layer.

18. The non-transitory computer readable medium of claim 16 , the set of executable instructions further to:
route a stub at the first metal layer using a remaining portion of the first metal track.

Assignees

• Ati Technologies Ulc
• Advanced Micro Devices Inc

Inventors

• Rowhani Omid
• Cordos Ioan
• Hamel Kerry
• Clay Donald

Classifications

• G06F30/392

  Floor-planning or layout, e.g. partitioning or placement · CPC title

• G06F2111/20

  Configuration CAD, e.g. designing by assembling or positioning modules selected from libraries of predesigned modules · CPC title

• G06F30/394

  Routing (G06F30/396 takes precedence) · CPC title

• G06F17/5077

  Physics · mapped topic

• H01L27/11807

  Electricity · mapped topic