Semiconductor device and its manufacturing method

Patent metadata

Field	Value
Publication number	US-9972505-B2
Application number	US-201514943900-A
Country	US
Kind code	B2
Filing date	Nov 17, 2015
Priority date	Dec 17, 2014
Publication date	May 15, 2018
Grant date	May 15, 2018

Abstract

The present invention makes it possible to improve the reliability of a semiconductor device. The semiconductor device has, over a semiconductor substrate, a pad electrode formed at the uppermost layer of a plurality of wiring layers, a surface protective film having an opening over the pad electrode, a redistribution line being formed over the surface protective film and having an upper surface and a side surface, a sidewall barrier film comprising an insulating film covering the side surface and exposing the upper surface of the redistribution line, and a cap metallic film covering the upper surface of the redistribution line. Then the upper surface and side surface of the redistribution line are covered with the cap metallic film or the sidewall barrier film and the cap metallic film and the sidewall barrier film have an overlapping section.

First claim

What is claimed is:

1. A semiconductor device comprising:
a semiconductor substrate;
a plurality of wiring layers formed over the semiconductor substrate;
a first pad electrode formed at the uppermost layer of the wiring layers;
a protective film having an opening over the pad electrode;
a base metallic film formed over the protective film and the pad electrode;
a redistribution line formed over the base metallic film and having an upper surface and a side surface;
a sidewall barrier film comprised of an insulating film covering the side surface of the redistribution line; and
a cap metallic film covering the upper surface of the redistribution line,
wherein the upper surface and the side surface of the redistribution line are covered with the cap metallic film or the sidewall barrier film and the cap metallic film and the sidewall barrier film have an overlapping section, and
wherein a protective film over the redistribution line has an opening over the redistribution line to configure a second pad electrode that does not overlap with the first pad electrode.

2. A semiconductor device according to claim 1 , wherein the sidewall barrier film covers the sidewall of the base metallic film and is in contact with the protective film.

3. A semiconductor device according to claim 1 , wherein the cap metallic film is formed continuously from the upper surface to the side surface and covers the sidewall barrier film over the side surface.

4. A semiconductor device according to claim 1 , wherein the cap metallic film is formed continuously from the upper surface to the side surface and the sidewall barrier film covers the cap metallic film over the side surface.

5. A semiconductor device according to claim 1 , wherein the redistribution line has a lower surface facing the upper surface and the width of the redistribution line on the upper surface side is larger than the width of the redistribution line on the lower surface side.

6. A semiconductor device according to claim 1 , wherein the sidewall barrier film comprises a silicon nitride film or a silicon oxide film.

7. A semiconductor device according to claim 1 , wherein the redistribution line comprises a copper film.

8. A semiconductor device according to claim 7 , wherein the cap metallic film includes a titanium film, a tantalum film, a tungsten film, a nickel film, a titanium nitride film, a tantalum nitride film, a tungsten nitride film, or a nickel nitride film, which is in contact with the redistribution line.

9. A semiconductor device according to claim 1 , wherein the protective film and the sidewall barrier film comprise silicon nitride films.

Assignees

• Renesas Electronics Corp

Inventors

• Matsumoto Masahiro
• Maekawa Kazuyoshi
• Kawano Yuichi

Classifications

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W74/114

  by a substrate and the encapsulations · CPC title

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W72/9445

  Top-view layouts, e.g. mirror arrays · CPC title

• H10W72/9223

  with redistribution layers [RDL] · CPC title