Semiconductor device

Patent metadata

Field	Value
Publication number	US-9627344-B2
Application number	US-201414243245-A
Country	US
Kind code	B2
Filing date	Apr 2, 2014
Priority date	Apr 4, 2013
Publication date	Apr 18, 2017
Grant date	Apr 18, 2017

Abstract

The semiconductor device of the present invention includes an insulating layer, a copper wiring for wire connection formed on the insulating layer, a shock absorbing layer formed on an upper surface of the copper wiring, the shock absorbing layer being made of a metallic material with a hardness higher than copper, a bonding layer formed on the shock absorbing layer, the bonding layer having a connection surface for a wire, and a side protecting layer covering a side surface of the copper wiring, wherein the side protecting layer has a thickness thinner than a distance from the upper surface of the copper wiring to the connection surface of the bonding layer.

First claim

The invention claimed is:

1. A semiconductor device comprising:
a semiconductor chip including:
a semiconductor substrate;
a multilayer wiring structure disposed on the semiconductor substrate, the multilayer wiring structure including at least one insulating layer and at least one wiring layer;
a copper wiring for wire connection formed on the at least one insulating layer;
a shock absorbing layer formed on an upper surface of the copper wiring, the shock absorbing layer being made of a metallic material with a hardness higher than copper;
a bonding layer formed on the shock absorbing layer, the bonding layer having a connection surface;
a side protecting layer covering a side surface of the copper wiring from an upper end of the side surface to a lower end of the side surface, and
a barrier film interposed between the at least one insulating layer and the copper wiring;

a first lead on which the semiconductor chip is mounted;
a second lead separated from the first lead; and
a bonding wire bonded to the connection surface of the bonding layer and the second lead, wherein
the barrier film has an end surface positioned farther inside than the side surface of the copper wiring such that a level difference along a surface of the semiconductor substrate is formed between the end surface of the barrier film and the side surface of the copper wiring,
the side protecting layer has a thickness thinner than a distance from the upper surface of the copper wiring to the connection surface of the bonding layer,
a portion of the side protecting layer is disposed in the level difference while reaching the at least one insulating layer, and
the at least one wiring layer is disposed directly beneath a connection portion of the connection surface to which the bonding wire is bonded.

2. The semiconductor device according to claim 1 , wherein the shock absorbing layer is selectively formed only on the upper surface of the copper wiring.

3. The semiconductor device according to claim 2 , wherein the bonding layer has a first portion covering the side surface of the copper wiring and a second portion covering an upper surface of the shock absorbing layer, and
the side protecting layer includes the first portion of the bonding layer.

4. The semiconductor device according to claim 3 , wherein the copper wiring has a projecting portion projecting outwardly at the lower end of the side surface, and
the side protecting layer covers the side surface of the copper wiring from an upper end of the copper wiring to the projecting portion.

5. The semiconductor device according to claim 2 , wherein the side protecting layer includes a sidewall made of an insulating material.

6. The semiconductor device according to claim 5 , wherein the sidewall is made of an SiN film.

7. The semiconductor device according to claim 3 , wherein the shock absorbing layer has a side surface flush with the side surface of the copper wiring.

8. The semiconductor device according to claim 3 , wherein the shock absorbing layer projects more sidewardly than the copper wiring such that a level difference is formed between a side surface of the shock absorbing layer and the side surface of the copper wiring.

9. The semiconductor device according to claim 1 , wherein the shock absorbing layer has a first portion covering the side surface of the copper wiring and a second portion covering the upper surface of the copper wiring, the first portion having a thickness thinner than a thickness of the second portion, and
the side protecting layer includes the first portion of the shock absorbing layer.

10. The semiconductor device according to claim 9 , wherein the bonding layer has a first portion covering the first portion of the shock absorbing layer and a second portion covering the second portion of the shock absorbing layer, and
the side protecting layer further includes the first portion of the bonding layer.

11. The semiconductor device according to claim 1 , wherein the shock absorbing layer is made of an Ni film.

12. The semiconductor device according to claim 1 , wherein the bonding layer includes a stacked structure consisting of a Pd film and an Au film stacked in that stated order from the shock absorbing layer.

13. The semiconductor device according to claim 1 , wherein the level difference is below the copper wiring.

14. The semiconductor device according to claim 1 , wherein the barrier film is made of Ti.

15. The semiconductor device according to claim 1 , wherein a plurality of copper wirings, each of which is the copper wiring, are formed at a wiring-to-wiring distance of less than 20 μm.

16. The semiconductor device according to claim 1 , wherein a part of the shock absorbing layer disposed on the upper surface of the copper wiring has a 2 μm to 4 μm thickness.

17. The semiconductor device according to claim 1 , wherein the at least one insulating layer includes a passivation film formed on a topmost surface of the multilayer wiring structure.

18. The semiconductor device according to claim 1 , wherein the side protecting layer completely covers the side surface of the copper wiring from an upper end of the copper wiring to a lower end of the copper wiring.

Assignees

• Rohm Co Ltd

Inventors

• Kageyama Satoshi
• Nishimura Isamu

Classifications

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W74/127

  characterised by arrangements for sealing or adhesion · CPC title

• H10W72/884

  Die-attach connectors and bond wires · CPC title

• H10W72/5522

  comprising gold [Au] · CPC title

• H10W72/5363

  the connected ends being wedge-shaped · CPC title