Semiconductor device and busbar

Patent metadata

Field	Value
Publication number	US-9967991-B2
Application number	US-201615288137-A
Country	US
Kind code	B2
Filing date	Oct 7, 2016
Priority date	Oct 10, 2014
Publication date	May 8, 2018
Grant date	May 8, 2018

Abstract

A semiconductor device, including a plurality of semiconductor modules, each including a semiconductor element, a main terminal and a wiring portion that connects the semiconductor element and the main terminal, and at least one busbar that each includes a terminal portion, and a plurality of attachment portions, the attachment portions being respectively connected to the main terminals of the semiconductor modules, such that the at least one busbar connects the semiconductor modules in parallel. The largest resistance among all resistances between the terminal portion and each of the attachment portions in each busbar is 10% or less of a resistance of the wiring portion in each semiconductor module. The largest inductance among all inductances between the terminal portion and each of the attachment portions in each busbar is 10% or less of an inductance of the wiring portion in each semiconductor module.

First claim

What is claimed is:

1. A semiconductor device comprising:
a plurality of semiconductor modules, each including
a semiconductor element,
a main terminal that is exposed to a periphery, and
a wiring portion that connects the semiconductor element and the main terminal; and

at least one busbar that each includes
a terminal portion, and
a plurality of attachment portions,

the attachment portions being respectively connected to the main terminals of the semiconductor modules, such that the at least one busbar connects the semiconductor modules in parallel, wherein
a largest resistance among all resistances between the terminal portion and each of the attachment portions in each busbar is 10% or less of a resistance of the wiring portion in each semiconductor module, and
a largest inductance among all inductances between the terminal portion and each of the attachment portions in each busbar is 10% or less of an inductance of the wiring portion in each semiconductor module.

2. The semiconductor device according to claim 1 , wherein
the largest resistance among all resistances between the terminal portion and each of the attachment portions in each busbar is 5% or less of the resistance of the wiring portion in each semiconductor module, and
the largest inductance among all inductances between the terminal portion and each of the attachment portions in each busbar is 5% or less of the inductance of the wiring portion in each semiconductor module.

3. The semiconductor device according to claim 1 ,
wherein the wiring portion in each semiconductor module includes an insulated substrate, a printed circuit board that faces the insulated substrate, and a conductive post that is connected to the printed circuit board.

4. The semiconductor device according to claim 3 ,
wherein in each semiconductor module the main terminal is connected to the insulated substrate and/or the printed circuit board.

5. The semiconductor device according to claim 1 , wherein
the main terminal in each semiconductor module includes a first main terminal and a second main terminal, and
the at least one busbar includes a first busbar and a second busbar, which are in parallel to each other, and are respectively connected to the first and second main terminals of each semiconductor module.

6. The semiconductor device according to claim 5 ,
wherein the first and second busbars have a gap therebetween that has a width of 1 mm or less.

7. A busbar for connecting a plurality of semiconductor modules in parallel with another busbar connecting the plurality of semiconductor modules, a gap between the busbar and the another busbar being 1 mm or less, the busbar comprising:
a terminal portion, and
a plurality of attachment portions, via which the plurality of semiconductor modules are connectable in parallel to the busbar, wherein
a difference between a largest resistance and a smallest resistance among all resistances between the terminal portion and each of the attachment portions is 25nQ or less, and
a difference between a largest inductance and a smallest inductance among all inductances between the terminal portion and each of the attachment portions is 2 nH or less.

8. The busbar according to claim 7 ,
wherein the difference between the largest inductance and the smallest inductance among all inductances between the terminal portion and each of the attachment portions is 1 nH or less.

Assignees

• Fuji Electric Co Ltd

Inventors

• Ichikawa Hiroaki

Classifications

• H10W90/00

  Package configurations · CPC title

• H10W72/00

  Interconnections or connectors in packages · CPC title

• H10W70/685

  comprising multiple insulating layers · CPC title

• H10W70/658 Primary

  for devices provided for in groups H10D8/00 - H10D48/00 · CPC title

• H10W70/635

  Through-vias · CPC title