Techniques for adaptive interface support

Patent metadata

Field	Value
Publication number	US-9965293-B2
Application number	US-201615394922-A
Country	US
Kind code	B2
Filing date	Dec 30, 2016
Priority date	Mar 29, 2014
Publication date	May 8, 2018
Grant date	May 8, 2018

Abstract

Techniques for adaptive interface support are described. In one embodiment, for example, an apparatus may comprise logic, at least a portion of which is in hardware, the logic to execute a basic input/output system (BIOS), determine a respective impedance state for each of one or more pins in an M.2 physical interface, determine an interface type for a peripheral device coupled with the M.2 physical interface based on the impedance states for the one or more pins, and control an operational state of the peripheral device during execution of the BIOS, based on the interface type for the peripheral device. Other embodiments are described and claimed.

First claim

The invention claimed is:

1. An apparatus, comprising:
memory to store instructions; and
processing circuitry coupled with the memory, the processing circuitry enabled to execute the instructions to:
execute a basic input/output system (BIOS),
determine a respective impedance state for each of one or more pins in an M.2 physical interface,
determine an interface type for a peripheral device coupled with the M.2 physical interface based on the impedance states for the one or more pins,
determine that the peripheral device comprises a Secure Digital Input/Output (SDIO) device when it is determined that each of the one or more pins is in a high-impedance state, and
transition the peripheral device to a reset state, execute an operating system, and initialize the peripheral device using the operating system when it is determined that the peripheral device comprises an SDIO device.

2. The apparatus of claim 1 , the processing circuitry to control an operational state of the peripheral device during execution of the BIOS, based on the interface type for the peripheral device.

3. The apparatus of claim 1 , the peripheral device comprising a Wi-Fi adapter.

4. The apparatus of claim 1 , the processing circuitry to determine that the peripheral device comprises a Peripheral Component Interconnect Express (PCIe) device when it is determined that an electrical load is present on at least one of the one or more pins.

5. The apparatus of claim 4 , the processing circuitry to maintain the peripheral device in an active state and initialize the peripheral device using the BIOS when it is determined that the peripheral device comprises a PCIe device.

6. The apparatus of claim 1 , the processing circuitry to transition the peripheral device to an active state after initializing the peripheral device using the operating system.

7. The apparatus of claim 1 , the one or more pins comprising one or more Peripheral Component Interconnect Express (PCIe) presence detect pins.

8. The apparatus of claim 1 , comprising:
a display;
a radio frequency (RF) transceiver; and
one or more RF antennas.

9. At least one non-transitory machine-readable medium comprising a set of instructions that, in response to being executed on a computing device, cause the computing device to:
execute a basic input/output system (BIOS) of the computing device;
determine a respective impedance state for each of one or more pins in an M.2 physical interface of the computing device;
determine an interface type for a peripheral device coupled with the M.2 physical interface based on the impedance states for the one or more pins;
determine that the peripheral device comprises a Secure Digital Input/Output (SDIO) device when it is determined that each of the one or more pins is in a high-impedance state; and
transition the peripheral device to a reset state and initialize the peripheral device using an operating system of the computing device when it is determined that the peripheral device comprises an SDIO device.

10. The at least one non-transitory machine-readable medium of claim 9 , comprising instructions that, in response to being executed on the computing device, cause the computing device to control an operational state of the peripheral device during execution of the BIOS, based on the interface type for the peripheral device.

11. The at least one non-transitory machine-readable medium of claim 9 , the peripheral device comprising a Wi-Fi adapter.

12. The at least one non-transitory machine-readable medium of claim 9 , comprising instructions that, in response to being executed on the computing device, cause the computing device to determine that the peripheral device comprises a Peripheral Component Interconnect Express (PCIe) device when it is determined that an electrical load is present on at least one of the one or more pins.

13. The at least one non-transitory machine-readable medium of claim 12 , comprising instructions that, in response to being executed on the computing device, cause the computing device to maintain the peripheral device in an active state and initialize the peripheral device using the BIOS when it is determined that the peripheral device comprises a PCIe device.

14. The at least one non-transitory machine-readable medium of claim 9 , comprising instructions that, in response to being executed on the computing device, cause the computing device to transition the peripheral device to an active state after initializing the peripheral device using the operating system.

15. The at least one non-transitory machine-readable medium of claim 9 , the one or more pins comprising one or more Peripheral Component Interconnect Express (PCIe) presence detect pins.

16. A method, comprising:
executing, by a processor circuit, a basic input/output system (BIOS) of a computing device;
determining a respective impedance state for each of one or more pins in an M.2 physical interface of the computing device;
determining an interface type for a peripheral device coupled with the M.2 physical interface based on the impedance states for the one or more pins;
determining that the peripheral device comprises a Secure Digital Input/Output (SDIO) device when it is determined that each of the one or more pins is in a high-impedance state; and
transitioning the peripheral device to a reset state and initializing the peripheral device using an operating system of the computing device when it is determined that the peripheral device comprises an SDIO device.

17. The method of claim 16 , the peripheral device comprising a Wi-Fi adapter.

18. The method of claim 16 , comprising determining that the peripheral device comprises a Peripheral Component Interconnect Express (PCIe) device when it is determined that an electrical load is present on at least one of the one or more pins.

19. The method of claim 18 , comprising maintaining the peripheral device in an active state and initializing the peripheral device using the BIOS when it is determined that the peripheral device comprises a PCIe device.

20. The method of claim 16 , comprising controlling an operational state of the peripheral device during execution of the BIOS, based on the interface type for the peripheral device.

21. The method of claim 16 , comprising transitioning the peripheral device to an active state after initializing the peripheral device using the operating system.

22. The method of claim 16 , the one or more pins comprising one or more Peripheral Component Interconnect Express (PCIe) presence detect pins.

Assignees

• Intel Corp

Inventors

• Desimone Nathaniel L
• Gough Robert E
• Dardis Sean C

Classifications

• G06F13/4282

  on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247) · CPC title

• G06F13/385

  for adaptation of a particular data processing system to different peripheral devices · CPC title

• G06F13/387

  for adaptation of different data processing systems to different peripheral devices, e.g. protocol converters for incompatible systems, open system · CPC title

• G06F9/4411 Primary

  Configuring for operating with peripheral devices; Loading of device drivers · CPC title

• G06F9/4406

  Loading of operating system · CPC title