Horizontal nanosheet FETs and methods of manufacturing the same

Patent metadata

Field	Value
Publication number	US-9960232-B2
Application number	US-201615340775-A
Country	US
Kind code	B2
Filing date	Nov 1, 2016
Priority date	May 9, 2016
Publication date	May 1, 2018
Grant date	May 1, 2018

Abstract

A horizontal nanosheet field effect transistor (hNS FET) including source and drain electrodes, a gate electrode between the source and drain electrodes, a first spacer separating the source electrode from the gate electrode, a second spacer separating the drain electrode from the gate electrode, and a channel region under the gate electrode and extending between the source electrode and the drain electrode. The source electrode and the drain electrode each include an extension region. The extension region of the source electrode is under at least a portion of the first spacer and the extension region of the drain electrode is under at least a portion of the second spacer. The hNS FET also includes at least one layer of crystalline barrier material having a first thickness at the extension regions of the source and drain electrodes and a second thickness less than the first thickness at the channel region.

First claim

What is claimed is:

1. A horizontal nanosheet field effect transistor, comprising:
a source electrode;
a drain electrode;
a gate electrode between the source electrode and the drain electrode;
a first spacer separating the source electrode from the gate electrode;
a second spacer separating the drain electrode from the gate electrode;
a channel region under the gate electrode, the channel region extending between the source electrode and the drain electrode;
the source electrode and the drain electrode each comprising an extension region, the extension region of the source electrode being under at least a portion of the first spacer and the extension region of the drain electrode being under at least a portion of the second spacer; and
at least one layer of crystalline barrier material, wherein the at least one layer has a first thickness at the extension regions of the source and drain electrodes and a second thickness less than the first thickness at the channel region.

2. The horizontal nanosheet field effect transistor of claim 1 , wherein the first thickness of the at least one layer of crystalline barrier material at the extension regions of the source and drain electrodes is from approximately 3 nm to approximately 5 nm and the second thickness of the at least one layer of crystalline barrier material at the channel region is from approximately 1 nm to approximately 2 nm.

3. The horizontal nanosheet field effect transistor of claim 1 , wherein the first thickness of the at least one layer of crystalline barrier material at the extension regions of the source and drain electrodes is from approximately 0.5 nm to approximately 5 nm and the second thickness of the at least one layer of crystalline barrier material at the channel region is substantially zero.

4. The horizontal nanosheet field effect transistor of claim 1 , wherein the at least one layer comprises a first layer of crystalline barrier material above the extension regions of the source and drain electrodes and a second layer of crystalline barrier material below the extension regions of the source and drain electrodes.

5. The horizontal nanosheet field effect transistor of claim 1 , wherein the crystalline barrier material is selected from the group of materials consisting of InP, InGaP, InAlA, AlAsSb, and combinations thereof.

6. The horizontal nanosheet field effect transistor of claim 1 , wherein the crystalline barrier material comprises a II-IV semiconductor alloy.

7. The horizontal nanosheet field effect transistor of claim 6 , wherein the II-IV semiconductor alloy is ZnSeTe or ZnCdTe.

8. The horizontal nanosheet field effect transistor of claim 1 , wherein upper portions of the source and drain electrodes are more heavily doped than remaining portions of the source and drain electrodes.

9. The horizontal nanosheet field effect transistor of claim 8 , wherein the more heavily doped upper portions of the source and drain electrodes each have a thickness from approximately 5 nm to approximately 10 nm.

10. The horizontal nanosheet field effect transistor of claim 1 , wherein the channel comprises a III-V material.

11. The horizontal nanosheet field effect transistor of claim 1 , wherein the extension regions of the source and drain electrodes are lightly doped having a doping density from approximately 5 e18/cm 3 to 1 e17/cm 3 .

12. The horizontal nanosheet field effect transistor of claim 1 , wherein an effective length of the channel region is greater than a length of the gate electrode.

13. The horizontal nanosheet field effect transistor of claim 12 , wherein the effective length of the channel region is greater than the length of the gate electrode by at least approximately 4 nm.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Obradovic Borna
• Rakshit Titash
• Rodder Mark

Classifications

• H10P50/646

  of Group III-V materials · CPC title

• H01L29/78621

  Electricity · mapped topic

• H01L29/66742

  Electricity · mapped topic

• H01L29/1033

  Electricity · mapped topic

• H01L29/0847

  Electricity · mapped topic