Voltage generator to compensate for process corner and temperature variations

Patent metadata

Field	Value
Publication number	US-9959915-B2
Application number	US-201615151617-A
Country	US
Kind code	B2
Filing date	May 11, 2016
Priority date	Dec 11, 2015
Publication date	May 1, 2018
Grant date	May 1, 2018

Abstract

The present disclosure describes a system, a circuit, and method for process and temperature compensation in an integrated circuit. For example, the system includes a bus, a data latch, and a voltage generator. The data latch includes a plurality of transistors coupled to the bus. The voltage generator includes a tracking transistor with one or more physical characteristics that substantially match one or more respective physical characteristics—e.g., gate width and gate length dimensions—of at least one of the plurality of transistors in the data latch. The voltage generator is configured to adjust a pre-charged voltage on the bus based on an electrical characteristic of the tracking transistor.

First claim

What is claimed is:

1. A system comprising:
a bus;
a data latch comprising a plurality of transistors coupled to the bus; and
a voltage generator comprising a tracking transistor,
wherein one or more physical characteristics of the tracking transistor substantially match one or more respective physical characteristics of at least one of the plurality of transistors in the data latch, and
wherein the voltage generator is configured to adjust a pre-charged voltage on the bus based on an electrical characteristic of the tracking transistor.

2. The system of claim 1 , wherein the system further comprises:
a sensing circuit coupled to the data latch via the bus, wherein the sensing circuit comprises a strobe transistor controlled by a strobe control signal, wherein the strobe control signal comprises a strobe control signal timing window based on a discharge rate of the pre-charged voltage, and wherein the discharge rate is based on the electrical characteristic of the tracking transistor.

3. The system of claim 1 , wherein the voltage generator comprises an adjustable resistor circuit coupled to the tracking transistor and a current source, wherein the adjustable resistor circuit is configured to change a resistor value between the tracking transistor and the current source based on monitored temperature.

4. The system of claim 1 , wherein the voltage generator is configured to lower the pre-charged voltage in response to an increase in temperature.

5. The system of claim 1 , wherein the tracking transistor comprises a connection between a drain terminal of the tracking transistor and a gate terminal of the tracking transistor.

6. The system of claim 1 , wherein the tracking transistor and the at least one of the plurality of transistors in the data latch are n-channel metal-oxide-semiconductor field-effect transistors.

7. The system of claim 1 , wherein the at least one of the plurality of transistors in the data latch comprises a pass transistor for the data latch.

8. The system of claim 1 , wherein the one or more physical characteristics of the tracking transistor comprise gate width and gate length dimensions.

9. A method comprising:
generating, with a voltage generator, a pre-charged voltage on a bus coupled to a data latch; and
adjusting the pre-charged voltage based on temperature;
wherein the data latch comprises a plurality of transistors coupled to the bus, and
wherein the voltage generator comprises a tracking transistor, the tracking transistor comprising one or more physical characteristics that substantially match one or more respective physical characteristics of at least one of the plurality of transistors in the data latch.

10. The method of claim 9 , further comprising:
discharging the pre-charged voltage via a strobe transistor controlled by a strobe control signal.

11. The method of claim 10 , wherein discharging the pre-charged voltage further comprises storing a voltage potential on the bus in the data latch.

12. The method of claim 9 , wherein the adjusting comprises lowering the pre-charged voltage in response to an increase in temperature.

13. The method of claim 9 , wherein the tracking transistor and the at least one of the plurality of transistors in the data latch have the same device type.

14. The method of claim 9 , wherein the one or more physical characteristics of the tracking transistor comprise gate width and gate length dimensions.

15. A circuit comprising:
data latch circuitry coupled to a bus; and
a voltage generator comprising a tracking transistor, wherein:
a physical characteristic of the tracking transistor is configured to correspond to a physical characteristic of a transistor of the data latch circuitry, and
the voltage generator is configured to vary a pre-charge voltage potential on the bus based on an electrical characteristic of the tracking transistor.

16. The circuit of claim 15 , wherein the physical characteristic of the tracking transistor configured to correspond to the physical characteristic of the transistor of the data latch circuitry comprises one or more of a transistor dimension, a gate dimension, a gate width, a gate length, a transistor process, and an oxide thickness.

17. The circuit of claim 15 , wherein the tracking transistor and the transistor of the data latch circuitry are fabricated using a same process technology.

18. The circuit of claim 15 , wherein:
a first terminal of the tracking transistor is coupled to the common node; and
a second terminal of the tracking transistor is coupled to the bus and a gate terminal of the tracking transistor.

19. The circuit of claim 18 , wherein the second terminal of the tracking transistor is coupled to the bus through an adjustable resistor circuit, the adjustable resistor circuit configured to change a resistor value between the second terminal and the bus based on a temperature signal.

20. The circuit of claim 15 , wherein the voltage generator is configured to vary the pre-charge voltage potential on the bus based on a temperature signal, the voltage generator further comprising:
a current source configured to generate a current;
adjustable resistance circuitry configured to change a resistor value between the tracking transistor and the current source based on the temperature signal; and
temperature control circuitry configured to select an amount of resistance provided by the adjustable resistance circuitry based on the temperature signal.

Assignees

• Sandisk Technologies Llc

Inventors

• Desai Amul
• Nguyen Hao
• Mui Man
• Kwon Ohwon

Classifications

• G11C7/10

  Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers · CPC title

• H01L27/0211

  Electricity · mapped topic

• G11C7/12 Primary

  Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines · CPC title

• G11C7/22

  Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management · CPC title

• H10D89/105

  adapted for thermal considerations · CPC title