Automatic debug information collection

Patent metadata

Field	Value
Publication number	US-9954727-B2
Application number	US-201514791661-A
Country	US
Kind code	B2
Filing date	Jul 6, 2015
Priority date	Mar 6, 2015
Publication date	Apr 24, 2018
Grant date	Apr 24, 2018

Abstract

A baseboard management controller (BMC) of a system can retrieve logged system events from a non-volatile storage of the BMC and receive a command from an administrator device for the BMC to collect system debug information. The BMC can obtain debug information from a component of the system, in response to receiving the command. The BMC can save the debug information to a debug file and send the debug file to the administrator device.

First claim

The invention claimed is:

1. A method comprising:
receiving, by a physical baseboard management controller (BMC) of a system, a command from an administrator device to collect system debug information, the physical BMC being connected to a Basic Input/Output System (BIOS) and a processor of the system via a southbridge of the system;
retrieving, by the physical BMC, logged system events from a non-volatile storage of the physical BMC;
obtaining, by the physical BMC, debug information from a component of the system, in response to receiving the command;
saving, by the physical BMC, the debug information to a debug file; and
sending, by the physical BMC, the debug file to the administrator device.

2. The method of claim 1 , wherein obtaining the debug information is based on the system events.

3. The method of claim 1 , wherein the component is the BIOS and the debug information comprises hardware configuration information for the system.

4. The method of claim 3 , further comprising requesting the BIOS to send to the physical BMC the hardware configuration information, in response to receiving the command.

5. The method of claim 3 , wherein the BIOS is configured to automatically send on system startup the hardware configuration information to the physical BMC.

6. The method of claim 3 , further comprising summarizing the hardware configuration information in a report comprising at least one of central processing unit (CPU) topology, memory topology, expansion slot topology, hardware identification, or hardware network address.

7. The method of claim 1 , wherein the component is a graphics unit of the physical BMC and the debug information comprises a screenshot of the system hanging captured by the graphics unit.

8. The method of claim 1 , wherein the debug information comprises register settings for at least one of a register of a processor, a south bridge, or another device connected to the processor or the south bridge.

9. The method of claim 1 , wherein the component is the BIOS and the debug information comprises a power-on self-test (POST) redirect message.

10. The method of claim 9 , further comprising directing the BIOS to enable a debug mode and send the POST redirect message to the physical BMC, in response to receiving the command.

11. The method of claim 10 , wherein directing the BIOS includes setting a debug mode BIOS flag to indicate to the BIOS to enter the BIOS debug mode.

12. A system comprising:
a physical baseboard management controller (BMC); and
a non-transitory computer-readable medium including instructions which, when executed by the physical BMC, causes the physical BMC to:
receive, by the physical BMC, a command from an administrator device to collect system debug information, the physical BMC being connected to a Basic Input/Output System (BIOS) and a processor of the system via a Southbridge of the system;
retrieve, by the physical BMC, logged system events from a non-volatile storage of the physical BMC;
obtain debug information from a component of the system, in response to receiving the command;
save the debug information to a debug file; and
send the debug file to the administrator device.

13. The system of claim 12 , wherein the component is the BIOS and the debug information comprises hardware configuration information for the system.

14. The system of claim 13 , further comprising requesting the BIOS to send to the physical BMC the hardware configuration information, in response to receiving the command.

15. The system of claim 13 , wherein the BIOS is configured to automatically send on system startup the hardware configuration information to the physical BMC.

16. The system of claim 12 , wherein the component is a graphics unit of the physical BMC and the debug information comprises a screenshot of the system hanging captured by the graphics unit.

17. The system of claim 12 , wherein the debug information comprises register settings for at least one of a register of a processor, a south bridge, or another device connected to the processor or the south bridge.

18. The system of claim 12 , wherein the component is the BIOS and the debug information comprises a power-on self-test (POST) redirect message.

19. The system of claim 18 , further comprising directing the BIOS to enable a debug mode and send the POST redirect message to the physical BMC, in response to receiving the command.

20. The system of claim 19 , wherein directing the BIOS includes setting a debug mode BIOS flag to indicate to the BIOS to enter the BIOS debug mode.

Assignees

• Quanta Comp Inc

Inventors

• Su Mei-Lin
• Hung Ming-Hung
• Chien Wei-Yu

Classifications

• H04L41/069 Primary

  using logs of notifications; Post-processing of notifications · CPC title

• H04L41/0686

  Additional information in the notification, e.g. enhancement of specific meta-data · CPC title