Semiconductor package structure and method for manufacturing the same

US9953930B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-9953930-B1
Application numberUS-201615299236-A
CountryUS
Kind codeB1
Filing dateOct 20, 2016
Priority dateOct 20, 2016
Publication dateApr 24, 2018
Grant dateApr 24, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor package structure includes a substrate, a semiconductor element, an encapsulant, an adhesion layer and a metal cap. The semiconductor element is disposed on the substrate. The encapsulant covers the semiconductor element. The adhesion layer is disposed on the encapsulant. The metal cap is attached to the encapsulant by the adhesion layer, and the metal cap is conformal with the encapsulant.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for manufacturing a semiconductor package structure, comprising: (a) providing a substrate with a semiconductor element disposed thereon; and (b) providing an encapsulant, an adhesion layer and a metal cap to form the semiconductor package structure, wherein the encapsulant covers the semiconductor element, the adhesion layer is disposed on the encapsulant, the metal cap is attached to the encapsulant by the adhesion layer, and the metal cap is conformal with the encapsulant; wherein (b) includes: (b1) forming the encapsulant on the substrate to cover the semiconductor element; (b2) providing a metal foil; (b3) forming the adhesion layer on a surface of the metal foil; (b4) disposing the metal foil above the encapsulant, wherein the adhesion layer faces the encapsulant; and (b5) punching the metal foil to the encapsulant, so as to form the metal cap attached to the encapsulant by the adhesion layer, such that the metal cap is conformal with the encapsulant. 2. The method according to claim 1 , wherein, after (b1), the method further includes: (b11) curing the encapsulant. 3. A method for manufacturing a semiconductor package structure, comprising: (a) providing a substrate with a semiconductor element disposed thereon; and (b) providing an encapsulant, an adhesion layer and a metal cap to form the semiconductor package structure, wherein the encapsulant covers the semiconductor element, the adhesion layer is disposed on the encapsulant, the metal cap is attached to the encapsulant by the adhesion layer, and the metal cap is conformal with the encapsulant; wherein (b) includes: (b1) forming the encapsulant on the substrate to cover the semiconductor element; (b2) curing the encapsulant; (b3) forming the adhesion layer on a surface of the encapsulant; (b4) providing a metal foil; (b5) disposing the metal foil above the encapsulant and the adhesion layer; and (b6) punching the metal foil to the encapsulant, so as to form the metal cap attached to the encapsulant by the adhesion layer, such that the metal cap is conformal with the encapsulant. 4. The method according to claim 3 , wherein, after (b2), the method further includes: (b21) providing a mask defining an opening; and (b22) disposing the substrate in the opening of the mask; wherein, after (b3), the method further includes: (b31) removing the mask. 5. A method for manufacturing a semiconductor package structure, comprising: (a) providing a substrate with a semiconductor element disposed thereon; and (b) providing an encapsulant, an adhesion layer and a metal cap to form the semiconductor package structure by performing operations that comprise: (b1) providing the metal cap, wherein the metal cap defines a cavity, and the adhesion layer is disposed on the metal cap and in the cavity; (b2) dispensing an encapsulant material in the cavity; (b3) disposing the substrate adjacent to the metal cap, such that the semiconductor element faces the encapsulant material; and (b4) pressing the substrate to the metal cap, so that the encapsulant material covers the semiconductor element to form the encapsulant, the metal cap is attached to the encapsulant by the adhesion layer, and the metal cap is conformal with the encapsulant, wherein the encapsulant covers the semiconductor element, the adhesion layer is disposed on the encapsulant, the metal cap is attached to the encapsulant by the adhesion layer, and the metal cap is conformal with the encapsulant. 6. The method according to claim 5 , wherein a material of the adhesion layer is a solder mask, the metal cap includes at least one metal layer, a material of the metal layer is selected from a group consisting of silver, copper, gold, aluminum, zinc, brass, cadmium, nickel, phosphor bronze, iron, steel, stainless steel, and combinations thereof. 7. The method according to claim 5 , further comprising: (c) baking the semiconductor package structure. 8. A semiconductor package structure, comprising: a substrate having a first surface; a semiconductor element disposed on the first surface of the substrate; an encapsulant covering the semiconductor element; an adhesion layer disposed on the encapsulant; and a metal cap attached to the encapsulant by the adhesion layer, wherein the metal cap is conformal with the encapsulant and contacts the first surface of the substrate, and wherein the encapsulant includes a first surface and a side surface, the adhesion layer includes a first portion and a side portion, the metal cap includes a first portion and a side portion, the first portion of the metal cap is attached to the first surface of the encapsulant by the first portion of the adhesion layer, and the side portion of the metal cap is attached to the side surface of the encapsulant by the side portion of the adhesion layer. 9. The semiconductor package structure according to claim 8 , wherein the metal cap includes at least two metal layers, and materials of the metal layers are different. 10. The semiconductor package structure according to claim 8 , wherein a material of the adhesion layer includes an interpenetrating polymer network structure. 11. The semiconductor package structure according to claim 8 , wherein the first portion of the metal cap defines an opening to expose a portion of the adhesion layer. 12. The semiconductor package structure according to claim 8 , wherein the adhesion layer is formed from a thermosetting resin or a photosetting resin. 13. The semiconductor package structure according to claim 8 , wherein a material of the encapsulant is a molding compound. 14. The semiconductor package structure according to claim 8 , wherein a material of the adhesion layer is a solder mask. 15. The semiconductor package structure according to claim 8 , wherein the metal cap includes an extending portion attached to a side surface of the substrate. 16. The semiconductor package structure according to claim 15 , wherein the metal cap includes a grounding pin, and the grounding pin connects to the extending portion. 17. The semiconductor package structure according to claim 8 , wherein the metal cap includes at least one metal layer. 18. The semiconductor package structure according to claim 17 , wherein a material of the metal layer is selected from a group consisting of silver, copper, gold, aluminum, zinc, brass, cadmium, nickel, phosphor bronze, iron, steel, stainless steel, and combinations thereof.

Assignees

Inventors

Classifications

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • characterised by the relative positions of pads or connectors relative to package parts · CPC title

  • Containers or parts thereof · CPC title

  • by multiple encapsulations, e.g. by a thin protective coating and a thick encapsulation · CPC title

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Frequently asked questions

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What does patent US9953930B1 cover?
A semiconductor package structure includes a substrate, a semiconductor element, an encapsulant, an adhesion layer and a metal cap. The semiconductor element is disposed on the substrate. The encapsulant covers the semiconductor element. The adhesion layer is disposed on the encapsulant. The metal cap is attached to the encapsulant by the adhesion layer, and the metal cap is conformal with the …
Who is the assignee on this patent?
Advanced Semiconductor Eng
What technology area does this patent fall under?
Primary CPC classification H10W74/117. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 24 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).