Preventing oxidation defects in strain-relaxed fins by reducing local gap fill voids

US9953879B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-9953879-B1
Application numberUS-201615284110-A
CountryUS
Kind codeB1
Filing dateOct 3, 2016
Priority dateOct 3, 2016
Publication dateApr 24, 2018
Grant dateApr 24, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor structure includes a strain-relaxed semiconductor substrate, fins on the strain-relaxed semiconductor substrate, the fins each having a bottom inactive region and an exposed top active region. The semiconductor structure further includes a liner layer along sidewalls of the bottom inactive region and adjacent surface areas of the strain-relaxed semiconductor substrate, a densified local fill layer surrounding the bottom inactive regions of the plurality of fins, a densified global fill layer adjacent outer sidewalls of the densified local fill layer, and a hard mask layer separating the densified global fill layer from the substrate and the densified local fill layer, a lack of voids in the densified local fill layer resulting in the bottom inactive regions of the fins being substantially free of oxidation defects. A method to realize the structure is also disclosed, the method preventing oxidation defects in strain-relaxed fins by reducing local gap fill voids.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method, comprising: providing a starting semiconductor structure, the starting semiconductor structure comprising a stress-relaxed buffer (SRB) semiconductor substrate with a relatively low concentration of germanium in silicon germanium, a plurality of fins coupled to the SRB semiconductor substrate, each fin comprising a top active region with a relatively higher percentage of germanium in silicon germanium as compared to the SRB semiconductor substrate, and a bottom fin body, a hard mask cap over each fin, the starting semiconductor structure also having a conformal blanket hard mask layer thereover; forming a densified local isolation layer around the fins, resulting in a local fin structure; forming a protective layer around the local fin structure, resulting in a protected local fin structure; forming a densified global isolation layer on either side of the protected local fin structure up to a bottom surface of active areas of the plurality of fins; and exposing the active regions of the plurality of fins, wherein exposing the active regions of the plurality of fins comprises: removing a top horizontal portion of the protective layer; recessing the densified local isolation layer down to the bottom surfaces of the active areas of the plurality of fins, the recessing resulting in an exposed portion of the protective layer; and removing the exposed portion of the protective layer, leaving the active areas exposed. 2. The method of claim 1 , wherein forming the densified local isolation layer comprises: forming a local isolation layer around the fins; and annealing the local isolation layer, resulting in the densified local isolation layer. 3. The method of claim 2 , wherein forming the local isolation layer around the fins comprises forming a layer of silicon dioxide using a chemical-vapor deposition process. 4. The method of claim 1 , wherein forming the protective layer comprises forming a hard mask layer. 5. The method of claim 1 , wherein forming the densified global isolation layer comprises: forming a global isolation layer over the structure; and annealing the global isolation layer, resulting in the densified global isolation layer. 6. The method of claim 5 , wherein forming the global isolation layer comprises forming a global silicon dioxide layer using a chemical-vapor deposition process. 7. The method of claim 1 , wherein removing the exposed portion of the protective layer comprises selective removal of the exposed portion of the protective layer. 8. The method of claim 1 , further comprising after forming the densified local isolation layer and before forming the protective layer around the local fin structure, removing one or more unwanted fins of the plurality of fins and associated portions of the densified local isolation layer, and forming the protective layer around remaining fins and associated densified local isolation layer. 9. A method, comprising: providing a starting semiconductor structure, the starting semiconductor structure comprising a stress-relaxed buffer (SRB) semiconductor substrate with a relatively low concentration of germanium in silicon germanium, a plurality of fins coupled to the SRB semiconductor substrate, each fin comprising a top active region with a relatively higher percentage of germanium in silicon germanium as compared to the SRB semiconductor substrate, and a bottom fin body, a hard mask cap over each fin, the starting semiconductor structure also having a conformal blanket hard mask layer thereover; forming a densified local isolation layer around the fins, resulting in a local fin structure; forming a protective layer around the local fin structure, resulting in a protected local fin structure; forming a densified global isolation layer on either side of the protected local fin structure up to a bottom surface of active areas of the plurality of fins; exposing the active regions of the plurality of fins; removing a top horizontal portion of the protective layer; recessing the densified local isolation layer down to the bottom surfaces of the active areas of the plurality of fins, the recessing resulting in an exposed portion of the protective layer; removing the exposed portion of the protective layer, leaving the active areas exposed; after removing the top horizontal portion and before recessing the densified local isolation layer, forming a protective layer around the structure; and recessing the protective layer to expose the densified local isolation layer, hard mask caps and side portions of the conformal blanket hard mask layer. 10. The method of claim 9 , wherein forming the densified local isolation layer comprises: forming a local isolation layer around the fins; and annealing the local isolation layer, resulting in the densified local isolation layer. 11. The method of claim 10 , wherein forming the local isolation layer around the fins comprises forming a layer of silicon dioxide using a chemical-vapor deposition process. 12. The method of claim 10 , wherein forming the protective layer comprises forming a hard mask layer. 13. The method of claim 10 , wherein forming the densified global isolation layer comprises: forming a global isolation layer over the structure; and annealing the global isolation layer, resulting in the densified global isolation layer. 14. The method of claim 13 , wherein forming the global isolation layer comprises forming a global silicon dioxide layer using a chemical-vapor deposition process. 15. The method of claim 10 , further comprising after forming the densified local isolation layer and before forming the protective layer around the local fin structure, removing one or more unwanted fins of the plurality of fins and associated portions of the densified local isolation layer, and forming the protective layer around remaining fins and associated densified local isolation layer. 16. The method of claim 9 , wherein removing the exposed hard mask portion of the protective layer comprises selective removal of the exposed hard mask portion of the protective layer.

Assignees

Inventors

Classifications

  • the material being a silicon oxide, e.g. SiO2 · CPC title

  • of treatments performed after formation of the materials · CPC title

  • using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition (deposition by physical ablation of a target H10P14/6329) · CPC title

  • formed using trench refilling with dielectric materials, e.g. shallow trench isolations · CPC title

  • using trench refilling with dielectric materials, e.g. shallow trench isolations · CPC title

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What does patent US9953879B1 cover?
A semiconductor structure includes a strain-relaxed semiconductor substrate, fins on the strain-relaxed semiconductor substrate, the fins each having a bottom inactive region and an exposed top active region. The semiconductor structure further includes a liner layer along sidewalls of the bottom inactive region and adjacent surface areas of the strain-relaxed semiconductor substrate, a densifi…
Who is the assignee on this patent?
Globalfoundries Inc
What technology area does this patent fall under?
Primary CPC classification H01L21/823481. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 24 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).