Spin orbit torque MRAM memory cell with enhanced thermal stability

US9953692B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-9953692-B1
Application numberUS-201715485049-A
CountryUS
Kind codeB1
Filing dateApr 11, 2017
Priority dateApr 11, 2017
Publication dateApr 24, 2018
Grant dateApr 24, 2018

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

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An in-plane SOT MRAM non-volatile memory cell has enhanced thermal stability due to coercive pinning provided by an adjacent antiferromagnetic layer that has a thickness that is less than a minimum critical thickness needed to provide exchange bias.

First claim

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What is claimed is: 1. An apparatus, comprising: a non-volatile memory cell comprising: a magnetic tunnel junction that includes a free layer and a pinned layer, wherein the free layer comprises a first ferromagnetic layer that has a switchable direction of magnetization; and a first antiferromagnetic layer in contact with the first ferromagnetic layer, the first antiferromagnetic layer has a thickness that is less than a minimum critical thickness needed to provide exchange bias for the first ferromagnetic layer. 2. The apparatus of claim 1 , wherein: the first antiferromagnetic layer has a thickness such that the first antiferromagnetic layer provides coercivity to the first ferromagnetic layer. 3. The apparatus of claim 1 , wherein: the non-volatile memory cell further comprises a Spin Hall Effect layer in contact with, but separate from, the first antiferromagnetic layer and configured to act as a source of spin current to the magnetic tunnel junction in response to an electrical current across the Spin Hall Effect layer. 4. The apparatus of claim 1 , wherein: the non-volatile memory cell is a SOT MRAM memory cell. 5. The apparatus of claim 1 , wherein: the magnetic tunnel junction further comprises an inter-layer coupling (ILC) layer, a reference layer, and a tunnel barrier; the inter-layer coupling (ILC) layer is positioned between the pinned layer and the reference layer; and the tunnel barrier is positioned between the reference layer and the free layer. 6. The apparatus of claim 5 , wherein: the non-volatile memory cell further comprises a second antiferromagnetic layer adjacent the pinned layer; and the second antiferromagnetic layer has a thickness large enough to provide for exchange bias for the pinned layer. 7. The apparatus of claim 1 , wherein: the magnetic tunnel junction is round. 8. The apparatus of claim 1 , wherein: the MRAM memory cell further comprises a Spin Hall Effect layer in contact with the first antiferromagnetic layer and configured to act as a source of spin current into the first antiferromagnetic layer in response to an electrical current across the Spin Hall Effect layer; and the first antiferromagnetic layer is positioned between the Spin Hall Effect layer and the first ferromagnetic layer. 9. The apparatus of claim 8 , wherein: the magnetic tunnel junction is elliptical in shape; the Spin Hall Effect layer is rectangular in shape; and the first antiferromagnetic layer is elliptical in shape. 10. The apparatus of claim 8 , wherein: the magnetic tunnel junction is elliptical in shape; the Spin Hall Effect layer is rectangular in shape; and the first antiferromagnetic layer is rectangular in shape. 11. The apparatus of claim 1 , wherein: direction of magnetization for the first ferromagnetic layer is in plane. 12. The apparatus of claim 1 , further comprising a control circuit connected to the memory cell and configured to program non-volatile data into the non-volatile memory cell by changing the direction of magnetization of the first ferromagnetic layer. 13. The apparatus of claim 1 , wherein: the first antiferromagnetic layer is configured to act as a source of spin current for the first ferromagnetic layer in response to an electrical current across the first ferromagnetic layer. 14. The apparatus of claim 1 , wherein: the non-volatile memory cell further comprises a spacer adjacent the first antiferromagnetic layer and a second antiferromagnetic layer adjacent the spacer, the spacer is transparent to spin current. 15. An apparatus, comprising: a magnetic tunnel junction; and a layer of antiferromagnetic material in proximity to the magnetic tunnel junction, the layer of antiferromagnetic material has a thickness that is less than a minimum critical thickness needed to provide exchange bias, spin current is provided to the magnetic tunnel junction via the layer of antiferromagnetic material. 16. The apparatus of claim 15 , wherein: the magnetic tunnel junction includes a pinned layer and a free layer; the free layer has a switchable direction of magnetization; the layer of antiferromagnetic material is in contact with the free layer; the layer of antiferromagnetic material has a thickness such that the layer of antiferromagnetic layer provides coercivity to the free layer; and the apparatus further comprises a Spin Hall Effect layer in contact with, but separate from, the layer of antiferromagnetic material and configured to act as a source of spin current to the free layer in response to an electrical current across the Spin Hall Effect layer. 17. A method, comprising: applying a write current in a layer of material in proximity to a magnetic tunnel junction; generating spin current in the layer of material due to Spin Hall Effect in response to the write current; passing the spin current from the layer of material into and through an antiferromagnetic material, after passing through the antiferromagnetic material the spin current is injected into a free layer of the magnetic tunnel junction; imparting a torque on the free layer by the spin current incoming onto the free layer; and changing direction of magnetization of the free layer in response to the torque. 18. The method of claim 17 , wherein: the antiferromagnetic material is the layer of material in proximity to the magnetic tunnel junction. 19. The method of claim 17 , wherein: the antiferromagnetic material is between the magnetic tunnel junction and the layer of material in proximity to the magnetic tunnel junction. 20. The method of claim 17 , wherein: the antiferromagnetic material has a thickness that is less than a minimum critical thickness needed to provide exchange bias between the antiferromagnetic material and a free layer of the magnetic tunnel junction that is in contact with the antiferromagnetic material. 21. The method of claim 17 , wherein: the applying the write current comprises applying the write current through the layer of material below the magnetic tunnel junction without applying the write current across the magnetic tunnel junction. 22. An apparatus, comprising: a magnetic tunnel junction comprising a pinned ferromagnetic layer and a free ferromagnetic layer, the free ferromagnetic layer has a switchable direction of magnetization, the pinned ferromagnetic layer has a fixed direction of magnetization; and means for providing coercivity and spin current to the free ferromagnetic layer without providing exchange bias for the free ferromagnetic layer, the means for providing coercivity and spin current is separate from the pinned ferromagnetic layer.

Assignees

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Classifications

  • details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell · CPC title

  • Writing or programming circuits or methods · CPC title

  • Electricity · mapped topic

  • Electricity · mapped topic

  • Hall-effect devices (integrated devices or assemblies of multiple devices H10N59/00) · CPC title

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What does patent US9953692B1 cover?
An in-plane SOT MRAM non-volatile memory cell has enhanced thermal stability due to coercive pinning provided by an adjacent antiferromagnetic layer that has a thickness that is less than a minimum critical thickness needed to provide exchange bias.
Who is the assignee on this patent?
Sandisk Technologies Llc
What technology area does this patent fall under?
Primary CPC classification G11C11/1675. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Apr 24 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).