Wiring board with embedded component and integrated stiffener and method of making the same

US9947625B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9947625-B2
Application numberUS-201615283305-A
CountryUS
Kind codeB2
Filing dateOct 1, 2016
Priority dateDec 15, 2014
Publication dateApr 17, 2018
Grant dateApr 17, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A wiring board with embedded component and integrated stiffener is characterized in that an embedded semiconductor device, a first routing circuitry, an encapsulant and an array of vertical connecting elements are integrated as an electronic component disposed within a through opening of a stiffener, and a second routing circuitry is disposed beyond the through opening of the stiffener and extends over the stiffener. The mechanical robustness of the stiffener can prevent the wiring board from warping. The embedded semiconductor device is electrically coupled to the first routing circuitry and surrounded by the vertical connecting elements in electrical connection with the first and second routing circuitries. The first routing circuitry provides primary fan-out routing for another semiconductor device to be assembled on the wiring board, whereas the second routing circuitry not only provides further fan-out wiring structure, but also mechanically binds the electronic component with the stiffener.

First claim

Opening claim text (preview).

What is claimed is: 1. A face-to-face semiconductor assembly, comprising: a wiring board with embedded component and integrated stiffener, comprising: a stiffener having a through opening, wherein the through opening has an interior sidewall surface that extends through the stiffener; an electronic component that is positioned within the through opening of the stiffener and adjacent to the interior sidewall surface of the stiffener and includes a first semiconductor device, an encapsulant, an array of vertical connecting elements and a first routing circuitry disposed on a first surface of the encapsulant, wherein (i) the first semiconductor device is embedded in the encapsulant and electrically coupled to the first routing circuitry and (ii) the vertical connecting elements are laterally covered by the encapsulant and surround the first semiconductor device, wherein the vertical connecting elements are electrically coupled to the first routing circuitry and extend to a second surface of the encapsulant opposite to the first surface; and a second routing circuitry that is disposed over and in direct contact with the second surface of the encapsulant and laterally extending over and in direct contact with a surface of the stiffener, wherein the second routing circuitry is a buildup routing circuitry having metallized vias electrically coupled to and in direct contact with the vertical connecting elements in the encapsulant, and a second semiconductor device disposed in the through opening of the stiffener and face-to-face electrically coupled to the first semiconductor device through the first routing circuitry between the first semiconductor device and the second semiconductor device. 2. The face-to-face semiconductor assembly of claim 1 , wherein the vertical connecting elements include metal pillars, solder balls, conductive vias or a combination thereof. 3. The face-to-face semiconductor assembly of claim 1 , further comprising additional vertical connecting elements in the stiffener, wherein the additional vertical connecting elements are electrically coupled to the second routing circuitry. 4. The face-to-face semiconductor assembly of claim 3 , wherein the additional vertical connecting elements include metal pillars, solder balls, conductive vias or a combination thereof. 5. The face-to-face semiconductor assembly of claim 1 , wherein the first routing circuitry has an exposed surface facing away from the first surface of the encapsulant and exposed from the through opening of the stiffener. 6. The face-to-face semiconductor assembly wiring board of claim 5 , wherein a portion of the interior sidewall surface of the stiffener and the exposed surface of the first routing circuitry form a cavity in the through opening of the stiffener. 7. The face-to-face semiconductor assembly of claim 3 , further comprising a heat spreader that is attached to an inactive surface of the second semiconductor device and electrically coupled to the additional vertical connecting elements in the stiffener. 8. A method of making a face-to-face semiconductor assembly, comprising: providing an electronic component over a sacrificial carrier, the electronic component including a first semiconductor device, an encapsulant, an array of vertical connecting elements and a first routing circuitry disposed on a first surface of the encapsulant, wherein (i) the first routing circuitry is detachably adhered over the sacrificial carrier, (ii) the first semiconductor device is embedded in the encapsulant and electrically coupled to the first routing circuitry, and (iii) the vertical connecting elements are laterally covered by the encapsulant and extend to a second surface of the encapsulant opposite to the first surface, surround the first semiconductor device and are electrically coupled to the first routing circuitry; providing a stiffener that has a through opening, wherein the through opening has an interior sidewall surface that extends through the stiffener; inserting the electronic component and the sacrificial carrier into the through opening of the stiffener, with the electronic component and the sacrificial carrier being adjacent to the interior sidewall surface of the stiffener; forming a second routing circuitry that is disposed over and in direct contact with a second surface of the encapsulant opposite to the first surface and laterally extending over and in direct contact with a surface of the stiffener, wherein the second routing circuitry is a buildup circuitry having metallized vias electrically coupled to and in direct contact with the vertical connecting elements in the encapsulant; removing the sacrificial carrier from the first routing circuitry; and disposing a second semiconductor device in the through opening of the stiffener and face-to-face electrically coupled to the first semiconductor device through the first routing circuitry between the first semiconductor device and the second semiconductor device. 9. The method of claim 8 , wherein the step of providing the electronic component over the sacrificial carrier includes: providing the first routing circuitry detachably adhered over the sacrificial carrier; electrically coupling the first semiconductor device to the first routing circuitry; forming the vertical connecting elements; and providing the encapsulant that laterally surrounds the first semiconductor device and covers the first routing circuitry. 10. The method of claim 8 , wherein the step of forming the second routing circuitry includes electrically coupling the second routing circuitry to additional vertical connecting elements in the stiffener. 11. A face-to-face semiconductor assembly, comprising: a wiring board comprising: a stiffener having a through opening, wherein the through opening has an interior sidewall surface that extends through the stiffener; an electronic component that is positioned within the through opening of the stiffener and adjacent to the interior sidewall surface of the stiffener and includes a first semiconductor device, and encapsulant, an array of vertical connecting elements and first routing circuitry disposed on a first surface of the encapsulant, wherein (i) the first semiconductor device is embedded in the encapsulant and electrically coupled to the first routing circuitry and (ii) the vertical connecting elements are laterally covered by the encapsulant and surround the first semiconductor device, wherein the vertical connecting elements are electrically coupled to the first routing circuitry and extend to a second surface of the encapsulant opposite to the first surface; a second routing circuitry that is disposed over the second surface of the encapsulant and laterally extending over a surface of the stiffener, wherein the second routing circuitry is electrically coupled to the vertical connecting elements in the encapsulant; and additional vertical connecting elements in the stiffener, wherein the additional vertical connecting elements are electrically coupled to the second routing circuitry; a second semiconductor device disposed in the through opening of the stiffener and face-to-face electrically coupled to the first semiconductor device through the first routing circuitry between the first semiconductor device and the second semiconductor device; and a heat spreader that is attached to an inactive surface of the second semiconductor device and electrically coupled to the additional vertical connecting elements in the stiffener. 12. The face-to-face semiconductor assembly of claim 11 , wherein the vertical connecting elements of the electronic component positioned within the through opening of the stiffener include metal pillars,

Assignees

Inventors

Classifications

  • used as a support during manufacture of interconnect decals or build up layers · CPC title

  • using temporarily an auxiliary support · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • characterised by the relative positions of pads or connectors relative to package parts · CPC title

  • characterised by arrangements for thermal management of the stacked chips · CPC title

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What does patent US9947625B2 cover?
A wiring board with embedded component and integrated stiffener is characterized in that an embedded semiconductor device, a first routing circuitry, an encapsulant and an array of vertical connecting elements are integrated as an electronic component disposed within a through opening of a stiffener, and a second routing circuitry is disposed beyond the through opening of the stiffener and exte…
Who is the assignee on this patent?
Bridge Semiconductor Corp
What technology area does this patent fall under?
Primary CPC classification H10W70/614. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 17 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).