Integrated circuit stack

Patent metadata

Field	Value
Publication number	US-9947609-B2
Application number	US-201213416404-A
Country	US
Kind code	B2
Filing date	Mar 9, 2012
Priority date	Mar 9, 2012
Publication date	Apr 17, 2018
Grant date	Apr 17, 2018

Abstract

In some examples, an integrated circuit system includes a plurality of integrated circuit layers. At least one of the integrated circuit layers includes an integrated circuit die, which may not include any through-silicon vias that provide a pathway to an adjacent integrated circuit layer, and an interposer portion, which includes electrically conductive through-vias. The interposer portion may facilitate communication of the integrated circuit die with other integrated circuit layers of the integrated circuit system. In some examples, the stacked integrated circuit system may include more than one integrated circuit die, which may be in the same integrated circuit layer as at least one other integrated circuit die, or may be in a different integrated circuit layer.

First claim

What is claimed is:

1. A system comprising:
a first integrated circuit layer comprising a first plurality of interconnect elements;
a second integrated circuit layer comprising a second plurality of interconnect elements, wherein the second integrated circuit layer is a semiconductor device that comprises the second plurality of interconnect elements;
a third integrated circuit layer positioned between the first and second integrated circuit layers, wherein the first, second,…

Assignees

• Tucker James L
• Roosevelt Gary
• Heffner Kenneth H
• Hobbs James
• Honeywell Int Inc

Inventors

• Tucker James L
• Roosevelt Gary
• Heffner Kenneth H
• Hobbs James

Classifications

• H10W90/724

  Electricity · mapped topic

• H10W72/877

  Electricity · mapped topic

• H10W70/63

  Electricity · mapped topic

• H10W90/401

  Electricity · mapped topic

• H10W42/00

  Electricity · mapped topic