Graphene transistor and related methods

Patent metadata

Field	Value
Publication number	US-9941380-B2
Application number	US-201514954741-A
Country	US
Kind code	B2
Filing date	Nov 30, 2015
Priority date	Nov 30, 2015
Publication date	Apr 10, 2018
Grant date	Apr 10, 2018

Abstract

A method and structure for providing high-quality transferred graphene layers for subsequent device fabrication includes transferring graphene onto a hydrophobic surface of a hydrophobic layer and performing a thermal treatment process. In various embodiments, a substrate including an insulating layer is provided, and a hydrophobic layer is formed over the insulating layer. In some examples, a graphene layer is transferred onto the hydrophobic layer. By way of example, the transferred graphene layer has a first carrier mobility. In some embodiments, after transferring the graphene layer, an annealing process is performed, and the annealed graphene layer has a second carrier mobility greater than the first carrier mobility.

First claim

What is claimed is:

1. A method, comprising:
providing a substrate including an insulating layer;
depositing an octadecyltrichlorosilane (ODTS) multilayer film or an octyltrichlorosilane (OTS) multilayer film over the insulating layer;
cleaning a surface of the deposited ODTS multilayer film or the deposited OTS multilayer film in a solution including both anhydrous toluene and ethanol;
transferring a graphene layer onto the cleaned surface of the deposited ODTS multilayer film or the deposited OTS multilayer film, wherein the transferred graphene layer has a first carrier mobility; and
after transferring the graphene layer, performing an annealing process, wherein the annealed graphene layer has a second carrier mobility greater than the first carrier mobility.

2. The method of claim 1 , further comprising:
after performing the annealing process, forming source and drain electrodes in contact with the graphene layer.

3. The method of claim 1 , wherein the insulating layer includes a silicon dioxide layer formed over the substrate, and wherein the substrate is used as a global back-gate.

4. The method of claim 1 , wherein the substrate is an insulating substrate, and wherein the insulating layer includes the insulating substrate.

5. The method of claim 2 , further comprising:
after forming the source and drain electrodes, depositing a top-gate dielectric layer over the graphene layer; and
forming a top-gate electrode on the top-gate dielectric.

6. The method of claim 1 , wherein ODTS or OTS is provided as a solution in anhydrous toluene, and wherein the substrate including the insulating layer is immersed into the solution for about 24 hours to form the deposited ODTS multilayer film or the deposited OTS multilayer film.

7. The method of claim 1 , wherein the transferring the graphene layer onto the cleaned surface of the deposited ODTS multilayer film or the deposited OTS multilayer film is performed using a polymer-free transfer process.

8. The method of claim 1 , wherein the performing the annealing process includes performing the annealing process at an annealing temperature from about 150° C. to about 250° C.

9. The method of claim 1 , wherein the performing the annealing process includes performing the annealing process for a duration from about 10 minutes to about 240 minutes.

10. The method of claim 1 , wherein the performing the annealing process includes performing the annealing process in at least one of a nitrogen ambient and a noble gas ambient.

11. A method, comprising:
providing a substrate including a dielectric layer disposed thereon;
cleaning a surface of the dielectric layer to remove organic residues;
forming a hydrophobic layer on the cleaned surface of the dielectric layer;
after forming the hydrophobic layer, cleaning a surface of the hydrophobic layer in a solution of anhydrous toluene and ethanol;
transferring a CVD-grown graphene film onto the cleaned surface of the hydrophobic layer, wherein the CVD-grown graphene film has a first electron mobility and a first hole mobility; and
after transferring the CVD-grown graphene film, performing an annealing process, wherein the annealed CVD-grown graphene film has a second electron mobility greater than the first electron mobility and a second hole mobility greater than the first hole mobility.

12. The method of claim 11 , further comprising:
after performing the annealing process, forming source and drain electrodes in contact with the CVD-grown graphene film;
depositing a top-gate dielectric layer over the CVD-grown graphene film; and
forming a top-gate electrode over the top-gate dielectric.

13. The method of claim 11 , wherein the hydrophobic layer includes a hydrophobic material including at least one of octadecyltrichlorosilane (ODTS), octyltrichlorosilane (OTS), polytetrafluoroethylene (PTFE), polyethylene (PE), polypropylene (PP), polystyrene (PS), polyimide (PI), and wax.

14. The method of claim 13 , wherein the hydrophobic layer includes a hydrophobic surface having a contact angle (CA) of between about 90° and about 150° , and wherein the CVD-grown graphene film is transferred onto the hydrophobic surface of the hydrophobic layer.

15. The method of claim 11 , wherein the CVD-grown graphene film includes one of monolayer graphene, bilayer graphene, and multi-layer graphene.

16. The method of claim 11 , wherein performing the annealing process includes ramping up from about 25° C. to an annealing temperature of about 200° C. at a ramp rate of about 60° C. per minute.

17. The method of claim 16 , wherein the performing the annealing process includes performing the annealing process at the annealing temperature for a duration of about 120 minutes.

18. The method of claim 17 , wherein performing the annealing process includes ramping down from the annealing temperature to about 25° C. at a ramp rate of about 1° C. per minute.

19. A method, comprising:
providing a substrate including an insulating layer;
depositing an octadecyltrichlorosilane (ODTS) multilayer film or an octyltrichlorosilane (OTS) multilayer film over the insulating layer;
transferring a bilayer or multi-layer graphene film onto the deposited ODTS multilayer film or the deposited OTS multilayer film, wherein the transferred bilayer or multi-layer graphene film has a first carrier mobility;
after transferring the bilayer or multi-layer graphene film, performing an annealing process, wherein the annealed bilayer or multi-layer graphene film has a second carrier mobility greater than the first carrier mobility;
coating a surface of the annealed bilayer or multi-layer graphene film with at least one of CdSe/ZnS quantum dots and PbS quantum dots; and
forming source and drain electrodes in contact with the annealed bilayer or multi-layer graphene film.

20. The method of claim 19 , further comprising:
performing the annealing process at an annealing temperature of about 200° C. for a duration of about 120 minutes.

Assignees

• Taiwan Semiconductor Mfg Co Ltd
• Univ Nat Taiwan

Inventors

• Liu Shang-Yi
• Pan Samuel C
• Wu Chih-I
• Cheng Tsung-Chin

Classifications

• H10P95/90

  Thermal treatments, e.g. annealing or sintering · CPC title

• H10P95/00

  Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass · CPC title

• H10P14/687

  the materials being fluorocarbon compounds, e.g. (CHxFy) n or polytetrafluoroethylene · CPC title

• H10P14/683

  carbon-based polymeric organic materials, e.g. polyimides, poly cyclobutene or PVC · CPC title

• H10P54/00 Primary

  Cutting or separating of wafers, substrates or parts of devices · CPC title