Cable for alternative interconnect attachement

Patent metadata

Field	Value
Publication number	US-9924595-B2
Application number	US-201414567402-A
Country	US
Kind code	B2
Filing date	Dec 11, 2014
Priority date	Dec 11, 2014
Publication date	Mar 20, 2018
Grant date	Mar 20, 2018

Abstract

In one embodiment, the apparatus comprises: a substrate having a first side and a second side, the second side being on an opposite side of the substrate from the first side, where the substrate has a first location on the first side at which an semiconductor package is to be coupled; and a cable coupled to the substrate on the second side of the substrate at a second location on the second side, the second location being at least partially below the first location.

First claim

We claim:

1. An apparatus comprising:
a semiconductor package;
a substrate coupled to the semiconductor package and having a first side and a second side, the second side being on an opposite side of the substrate from the first side, the substrate having a first location on the first side at which the semiconductor package is coupled; and
a cable coupled to the substrate on the second side of the substrate at a second location on the second side and electrically coupled to the semiconductor package through the substrate, the second location being at least partially below the first location.

2. The apparatus defined in claim 1 wherein the cable is coupled to the substrate via a press fit connection in which a plurality of press fit tails of press fit pins extend through a plurality of vias that extend through the substrate.

3. The apparatus defined in claim 2 wherein the press fit pins are attached to the second side of the substrate at one or both of a package shadow via or a connector shadow via.

4. The apparatus defined in claim 2 wherein the press fit pins couple a socket to the substrate.

5. The apparatus defined in claim 1 wherein the second location on the second side opposite a semiconductor package shadow of the semiconductor package.

6. The apparatus defined in claim 1 further comprising:
a connector attached to the substrate; and
a cable attachment unit coupled to the connector to couple the cable to the receptacle.

7. The apparatus defined in claim 1 wherein the substrate comprises a printed circuit board (PCB).

8. The apparatus defined in claim 1 further comprising the semiconductor package coupled to a first side of the substrate at a first location.

9. The apparatus defined in claim 1 further comprising a cable connector to couple the cable at a third location on the substrate.

10. The apparatus defined in claim 9 wherein the cable connector is a QSFP connector.

11. The apparatus defined in claim 1 wherein the cable comprises a coax or twin-ax cable.

12. An apparatus comprising:
a semiconductor package;
a printed circuit board (PCB) having a first side and a second side and a plurality of vias, the second side being on an opposite side of the substrate from the first side, the PCB having a first location on the first side at which the semiconductor package is coupled; and
a cable coupled to the PCB on the second side of the PCB at a second location on the second side and communicably coupled to the semiconductor package through the PCB using a press fit connection in which a plurality of press fit tails of press fit pins extend through the plurality of vias that extend through the PCB, the second location being at least partially below the first location.

13. The apparatus defined in claim 12 wherein the press fit pins are attached to the second side of the substrate at one or both of a package shadow via or a connector shadow via.

14. The apparatus defined in claim 12 further comprising:
a connector attached to the substrate; and
a cable attachment unit coupled to the connector to couple the cable to the receptacle.

15. The apparatus defined in claim 12 further comprising the semiconductor package coupled to a first side of the substrate at a first location.

16. The apparatus defined in claim 12 further comprising a cable connector to coupled the cable at a third location on the substrate.

17. The apparatus defined in claim 16 wherein the cable connector is a QSFP connector.

18. The apparatus defined in claim 12 wherein the cable comprises a coax or twin-ax cable.

19. An apparatus comprising:
a substrate having a first side;
a semiconductor package coupled to the first side of the substrate;
a second semiconductor component coupled to the substrate;
a pair of cable attachment units attached to the first side of the substrate at locations away from the couplings of the semiconductor package and the second semiconductor component, wherein a first cable attachment unit of the pair is electrically coupled to the semiconductor package and a second cable attachment unit of the pair is electrically coupled to the second semiconductor component; and
a cable coupled to the substrate via the cable electrically coupling the pair of cable attachment units to each other.

20. The apparatus defined in claim 19 wherein a length of a trace in the substrate between the semiconductor package and the second semiconductor component used for communication therebetween exceeds that which is necessary to meet platform landing zone requirements for the apparatus.

21. A method for communicating information over an interconnect topology, the method comprising:
communicating signals from a first semiconductor package coupled to a first location on a first side of a substrate through the substrate to one or more of a plurality of devices using a cable coupled to at a second location on the second side of the substrate and electrically coupled to the first semiconductor package, the second location being at least partially below the first location, the first and second sides of the substrate being on opposite sides of the substrate; and
communicating information to the first semiconductor package from the one or more of a plurality of devices using the cable.

22. The method defined in claim 21 wherein the cable is coupled to the substrate via a press fit connection in which a plurality of press fit tails of press fit pins extend through a plurality of vias that extend into the substrate.

Assignees

• Intel Corp

Inventors

• Lee Beom-Taek
• Shibayama Raul Enriquez

Classifications

• H05K1/115 Primary

  Via connections; Lands around holes or via connections (H05K1/112 takes precedence) · CPC title

• H01R12/718

  Contact members provided on the PCB without an insulating housing (contacts for abutting H01R12/714) · CPC title

• H05K2201/10545

  Related components mounted on both sides of the PCB · CPC title

• H05K2201/10378

  Interposers · CPC title

• H05K2201/1059

  Connections made by press-fit insertion · CPC title