Method for manufacturing a capacitor for semiconductor devices

US9923047B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9923047-B2
Application numberUS-201514967956-A
CountryUS
Kind codeB2
Filing dateDec 14, 2015
Priority dateJan 6, 2015
Publication dateMar 20, 2018
Grant dateMar 20, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

Official abstract text for this publication.

The inventive concepts provide semiconductor devices and methods for manufacturing the same in which the method includes forming a capacitor including a bottom electrode, a dielectric layer and a top electrode sequentially stacked on a substrate, and also where formation of the top electrode includes forming a first metal nitride layer on the dielectric layer, and forming a second metal nitride layer on the first metal nitride layer, in which the first metal nitride layer is disposed between the dielectric layer and the second metal nitride layer, and the first metal nitride layer is formed at a temperature lower than a temperature at which the second metal nitride layer is formed.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for manufacturing a semiconductor device, the method comprising: forming a capacitor including a bottom electrode, a dielectric layer, and a top electrode which are sequentially stacked on a substrate, wherein forming the top electrode comprises: forming a first metal nitride layer on the dielectric layer; and forming a second metal nitride layer on the first metal nitride layer, wherein the first metal nitride layer is disposed between the dielectric layer and the second metal nitride layer, and wherein the first metal nitride layer is formed at a temperature that is lower than a temperature at which the second metal nitride layer is formed; and also wherein forming the first metal nitride layer comprises: performing a chemical vapor deposition (CVD) process using a first organic metal compound as a precursor in a nitrogen or ammonia gas atmosphere; and further wherein the first metal nitride layer includes titanium nitride (TiN), and wherein the first organic metal compound has a structure expressed by the following chemical formula 1, 2. The method of claim 1 , wherein the first metal nitride layer and the second metal nitride layer include the same metal element. 3. The method of claim 1 , wherein forming the top electrode further comprises: forming a metal oxide layer having conductivity between the dielectric layer and the first metal nitride layer. 4. The method of claim 3 , wherein forming the metal oxide layer comprises: performing a chemical vapor deposition (CVD) process using a second organic metal compound as a precursor in an ozone gas atmosphere. 5. The method of claim 4 , wherein the metal oxide layer includes TiO 2 , wherein the first metal nitride layer includes titanium nitride (TiN), and wherein the first and second organic metal compounds have a structure expressed by the following chemical formula 1, 6. The method of claim 3 , wherein the metal oxide layer, the first metal nitride layer, and the second metal nitride layer include the same metal element. 7. The method of claim 1 , wherein forming the first metal nitride layer comprises: forming a metal oxide layer on the dielectric layer; and nitrifying at least a portion of the metal oxide layer by a plasma process, wherein the plasma process uses nitrogen or ammonia as a plasma gas. 8. The method of claim 7 , wherein the metal oxide layer, the first metal nitride layer, and the second metal nitride layer include the same metal element. 9. The method of claim 7 , wherein forming the metal oxide layer comprises: performing a chemical vapor deposition (CVD) process using an organic metal compound as a precursor in an ozone gas atmosphere. 10. The method of claim 9 , wherein the metal oxide layer includes TiO 2 , and wherein the organic metal compound has a structure expressed by the following chemical formula 1, 11. A method for manufacturing a semiconductor device, the method comprising: forming a capacitor including a bottom electrode, a dielectric layer, and a top electrode which are sequentially stacked on a substrate, wherein forming the top electrode comprises: forming a first metal nitride layer on the dielectric layer; and forming a second metal nitride layer on the first metal nitride layer, wherein the first metal nitride layer is disposed between the dielectric layer and the second metal nitride layer, and wherein the first metal nitride layer is formed at a temperature that is lower than a temperature at which the second metal nitride layer is formed; and further wherein forming the top electrode further comprises: forming a semiconductor layer on the second metal nitride layer, wherein the first metal nitride layer and the second metal nitride layer are disposed between the dielectric layer and the semiconductor layer. 12. The method of claim 11 , wherein forming the first metal nitride layer comprises: performing a chemical vapor deposition (CVD) process using a first organic metal compound as a precursor in a nitrogen or ammonia gas atmosphere. 13. A method for manufacturing a semiconductor device, the method comprising: forming a capacitor including a bottom electrode, a dielectric layer, and a top electrode which are sequentially stacked on a substrate, wherein forming the top electrode comprises: forming a first metal nitride layer on the dielectric layer; and converting a phase of at least a portion of the first metal nitride layer into an amorphous state by a plasma process, wherein the plasma process uses nitrogen or ammonia as a plasma gas. 14. The method of claim 13 , wherein forming the top electrode further comprises: forming a semiconductor layer on the first metal nitride layer, wherein the first metal nitride layer is disposed between the dielectric layer and the semiconductor layer. 15. The method of claim 14 , wherein forming the top electrode further comprises: forming an additional metal nitride layer between the first metal nitride layer and the semiconductor layer. 16. The method of claim 13 , wherein forming the top electrode further comprises: forming a metal oxide layer having conductivity between the dielectric layer and the first metal nitride layer. 17. The method of claim 16 , wherein the metal oxide layer includes the same metal element as the first metal nitride layer. 18. The method of claim 16 , wherein forming the metal oxide layer comprises: performing a chemical vapor deposition (CVD) process using an organic metal compound as a precursor in an ozone gas atmosphere. 19. The method of claim 13 , further comprising: forming an interlayer insulating layer between the substrate and the capacitor; and forming a contact plug in the interlayer insulating layer, the contact plug penetrating the interlayer insulating layer so as to be connected to the substrate, wherein the bottom electrode is electrically connected to the substrate through the contact plug.

Assignees

Inventors

Classifications

  • Gettering within semiconductor bodies · CPC title

  • Electricity · mapped topic

  • H01L28/65Primary

    Electricity · mapped topic

  • Electricity · mapped topic

  • comprising multiple layers, e.g. comprising a barrier layer and a metal layer (barrier layers to prevent diffusion of hydrogen or oxygen in perovskite based capacitors H10D1/688) · CPC title

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What does patent US9923047B2 cover?
The inventive concepts provide semiconductor devices and methods for manufacturing the same in which the method includes forming a capacitor including a bottom electrode, a dielectric layer and a top electrode sequentially stacked on a substrate, and also where formation of the top electrode includes forming a first metal nitride layer on the dielectric layer, and forming a second metal nitride…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification H01L28/65. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 20 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).