Noise reduction board and electronic device

Patent metadata

Field	Value
Publication number	US-9918380-B2
Application number	US-201615208944-A
Country	US
Kind code	B2
Filing date	Jul 13, 2016
Priority date	Aug 13, 2015
Publication date	Mar 13, 2018
Grant date	Mar 13, 2018

Abstract

A noise reduction board includes: a first board; a second board arranged under the first board; a plurality of power feeding parts made of a metal in a shape of a pole and configured to electrically interconnect the first board and the second board; and a noise reduction part arranged between the power feeding parts, wherein the noise reduction part includes: a metal plate; an insulator configured to cover a surface of the metal plate; a first terminal provided on the side of the first board of the metal plate and electrically coupled to a ground pattern of the first board; and a second terminal provided on the side of the second board of the metal plate and electrically coupled to a ground pattern of the second board.

First claim

What is claimed is:

1. A noise reduction board comprising:
a first board;
a second board arranged under the first board;
a plurality of power feeding parts made of a metal in a shape of a pole and configured to electrically interconnect the first board and the second board; and
a noise reduction part arranged between the power feeding parts when viewed from above, the noise reduction part includes:
a metal plate;
an insulator configured to cover both surfaces of the metal plate;
a first terminal provided on the side of the first board of the metal plate and electrically coupled to a ground pattern of the first board; and
a second terminal provided on the side of the second board of the metal plate and electrically coupled to a ground pattern of the second board.

2. The noise reduction board according to claim 1 , wherein a semiconductor device is mounted on the first board, and a plurality of power supply sources are mounted on the second board.

3. The noise reduction board according to claim 2 , wherein the noise reduction part is arranged between one of the power feeding parts electrically coupled with one of the plurality of power supply sources and another one of the power feeding part electrically coupled with another one of the plurality of power supply sources.

4. The noise reduction board according to claim 2 , wherein a through hole is formed through the first board from one surface of the first board to another surface of the first board so as to electrically connect at least one of the power feeding parts with a semiconductor device.

5. The noise reduction board according to claim 4 , wherein a current output from at least one of the plurality of power supply sources is supplied to the semiconductor device from the second board through the through hole, without passing through pattern wiring of the first board.

6. The noise reduction board according to claim 1 , wherein the first terminal has a shape of a flat plate, and the second terminal has a shape of a pin, the first terminal is coupled to a planar terminal on a surface of the first board, and the second terminal is inserted into a through hole of the second board.

7. The noise reduction board according to claim 1 , wherein the noise reduction part has any one of an L shape, a straight-line shape, a crank shape, a n shape, and a cross shape, when viewed from above.

8. An electronic device comprising:
a housing; and
a noise reduction board accommodated in the housing, the noise reduction board includes:
a first board;
a second board arranged under the first board;
a plurality of power feeding parts made of a metal in a shape of a pole and configured to electrically interconnect the first board with the second board; and
a noise reduction part arranged between the power feeding parts when viewed from above, the noise reduction part includes:
a metal plate;
an insulator covering both surfaces of the metal plate;
a first terminal provided on the metal plate around the first board and electrically coupled to a ground pattern of the first board; and
a second terminal provided on the metal plate around the second board and electrically coupled to a ground pattern of the second board.

9. The electronic device according to claim 8 , wherein a semiconductor device is mounted on the first board, and a plurality of power supply sources are mounted on the second board.

10. The electronic device according to claim 9 , wherein the noise reduction part is arranged between one of the power feeding parts electrically coupled with one of the plurality of power supply sources and another one of the power feeding part electrically coupled with another one of the plurality of power supply sources.

11. The electronic device according to claim 9 , wherein a through hole is formed through the first board from one surface of the first board to another surface of the first board so as to electrically connect at least one of the power feeding parts with a semiconductor device.

12. The electronic device according to claim 11 , wherein a current output from at least one of the plurality of power supply sources is supplied to the semiconductor device from the second board through the through hole, without passing through pattern wiring of the first board.

13. The electronic device according to claim 8 , wherein the first terminal has a shape of a flat plate, and the second terminal has a shape of a pin, the first terminal is coupled to a planar terminal on a surface of the first board, and the second terminal is inserted into a through hole of the second board.

14. The electronic device according to claim 8 , wherein the noise reduction part has any one of an L shape, a straight-line shape, a crank shape, a n shape, and a cross shape, when viewed from above.

15. The noise reduction board according to claim 4 , wherein the power feeding parts, the through hole, and the semiconductor device are arranged roughly in a substantially straight line.

16. The electronic device according to claim 11 , wherein the power feeding parts, the through hole, and the semiconductor device are arranged roughly in a substantially straight line.

Assignees

• Fujitsu Ltd

Inventors

• Murakami Hajime

Classifications

• H10W70/655

  Fan-out layouts · CPC title

• H05K1/144 Primary

  Stacked arrangements of planar printed circuit boards · CPC title

• H05K1/0262

  Arrangements for regulating voltages or for using plural voltages · CPC title

• H05K1/023 Primary

  using auxiliary mounted passive components or auxiliary substances (printed passive components H05K1/16) · CPC title

• G06F1/184

  Mounting of motherboards · CPC title