Accelerated network packet processing

Patent metadata

Field	Value
Publication number	US-9912774-B2
Application number	US-201514977810-A
Country	US
Kind code	B2
Filing date	Dec 22, 2015
Priority date	Dec 22, 2015
Publication date	Mar 6, 2018
Grant date	Mar 6, 2018

Abstract

Devices and techniques for accelerated packet processing are described herein. The device can match an action to a portion of a network data packet and accelerate the packet-processing pipeline for the network data packet through the machine by processing the action.

First claim

What is claimed is:

1. A control device comprising:
a memory; and
a processor configured to:
match an action reference from a table to a portion of a data in a network data packet; and
process an action corresponding to the action reference in cooperation with the memory and accelerate a packet-processing pipeline for the network data packet by processing the action to one or more of: 1) offload processing of software-based resources to hardware-based resources, 2) reorganize processing of the software-based resources, and 3) reorganize how the software-based resources access the hardware-based resources;
wherein the processor is further configured to:
decapsulate an outer tunnel encapsulated header of the network data packet;
remove the outer tunnel encapsulated header from the network data packet; and
add metadata into a header for the network data packet that indicates the outer tunnel encapsulated header was removed from the network data packet.

2. The control device of claim 1 , wherein when the processor processes the action, the processing circuitry is further configured to perform a Ternary Content-Addressable Memory lookup on the portion of the data and insert results from the lookup into the network data packet as a pre-classification of the network data packet.

3. The control device of claim 1 , wherein when the processor processes the action, the processor is further configured to:
copy a packet payload from the network data packet; and
send the copied packet payload to an independent location, wherein the independent location is independent of locations, each location processes the packet-processing pipeline.

4. The control device of claim 1 , wherein when the processor processes the action, the processor is further configured to:
copy data packet forwarding rules from a virtual switch to a second virtual switch.

5. The control device of claim 1 , wherein when the processor is a physical function integrated into the control device.

6. The control device of claim 1 , wherein the processor is a virtualized function programmed into the control device.

7. The control device of claim 1 further includes:
a data plane interface configured to forward the network data packet to one of:
an Operating System (OS) kernel stack, a virtualized switch, and a driver.

8. The control device of claim 1 , wherein the control device is a network interface controller.

9. The control device of claim 8 , wherein the control device is interfaced and integrated into a multi-core hardware server.

10. A non-transitory machine-readable medium including instructions that, when executed on a machine cause the machine to perform operations including:
matching, within the machine, a portion of a network data packet to an action in a match-action table; and
accelerating processing of the network data packet through the machine by executing the action as part of a packet-processing pipeline for the network data packet through processing the action by one or more of: 1) offloading processing of software-based resources to hardware-based resources, 2) reorganizing processing of the software-based resources, and 3) reorganizing how the software-based resources access the hardware-based resources;
wherein accelerating further includes:
assigning the network data packet to a queue associated with a specific processing core of the machine
filtering the network data packet responsive to filtering rule;
setting a resource identifier on the network data packet that identifies a resource for processing against the network data packet when processing the network data packet through the packet-processing pipeline;
zero-copying rules for processing the network data packet into an aliased virtualized function;
processing a frame for the network data packet through a user-space pipeline of an Operating System (OS) and when finished pushing the frame into the aliased virtualized function; and
passing the network data packet through the user-space pipeline of the OS.

11. The non-transitory machine-readable medium of claim 10 , wherein the instructions to accelerate further include instructions to insert metadata into the network data. packet indicating a portion of the packet-processing pipeline was processed when the action was processed.

12. The non-transitory machine-readable medium of claim 10 , wherein instructions to accelerate further include instructions to:
copy a packet frame for the network data packet; and
send the copied packet frame to a location, where the location is independent of other locations associated with the packet-processing pipeline.

13. A system comprising:
a means for matching a portion of a network packet to an action;
a means for processing the action to accelerate a packet-processing pipeline associated with the network packet based on processing the action by processing the action to one or more of: offload processing of software-based resources to hardware-based resources, 2) reorganize processing of the software-based resources, and 3) reorganize how the software-based resources access the hardware-based resources;
wherein the means for processing the action to accelerate the packet-processing pipeline further includes processing to:
assign the network data packet to a queue associated with a specific processing core of the machine
filter the network data packet responsive to filtering rule;
set a resource identifier on the network data packet that identifies a resource for processing against the network data packet when processing the network data packet through the packet-processing pipeline;
zero-copy rules for processing the network data packet into an aliased virtualized function;
process a frame for the network data packet through a user-space pipeline of an Operating System(OS) and when finished pushing the frame into the aliased virtualized function; and
pass the network data packet through the user-space pipeline of the OS.

14. The system of claim 13 , wherein the network packet is sent from a first Virtual Machine (VM) to a second VM, and each of the VMs executing on a same multi-core server, wherein the same multi-core server executes the means for matching and the means for processing.

15. The system of claim 13 , the system further including a means for configuring the means for processing to custom-define the action.

16. The system of claim 13 , wherein the means for processing is one or more of:
a virtualized network switch, a hardware switch, a kernel process, a device driver, and virtualized interface.

17. A switch comprising:
ports for receiving network packets;
a control interface to communicate with a control device; and
a data plane interface to communicate with one or more data plane processors, wherein the switch is configured to evaluate, over the control interface, match-action rules for which network packets are designed to accelerated through a packet-processing pipeline for the network packets by custom-action processing performed by the switch to one or more of: 1) offloading processing of software-based resources to hardware-based resources, 2) reorganizing processing of the software-based resources, and 3) reorganizing how the software-based resources access the hardware-based resources;
wherein the switch is further configured to:
assign the network data packet to a queue associated with a specific processing core of the machine
filter the network data packet responsive to filtering rule;
set a resource identifier on the network data packet that identifies a resource for processing against the

Assignees

• Intel Corp

Inventors

• Daly Daniel
• Fastabend John
• Vick Matthew
• Skerry Brian J
• Varlese Marco
• Chen Jing Mark
• Zhou Danny Y

Classifications

• H04L69/324

  in the data link layer [OSI layer 2], e.g. HDLC · CPC title

• H04L69/22 Primary

  Parsing or analysis of headers · CPC title

• H04L49/70 Primary

  Virtual switches · CPC title

• H04L67/2804 Primary

  Electricity · mapped topic

• H04L67/561 Primary

  Adding application-functional data or data for application control, e.g. adding metadata · CPC title