Manufacturing method for semiconductor device having hole penetrating stack structure

Patent metadata

Field	Value
Publication number	US-9911751-B2
Application number	US-201615155937-A
Country	US
Kind code	B2
Filing date	May 16, 2016
Priority date	Dec 21, 2015
Publication date	Mar 6, 2018
Grant date	Mar 6, 2018

Abstract

A manufacturing method for a semiconductor device includes forming a first stacked structure, forming a first hole penetrating the first stacked structure, forming a reflective metal pattern in the first hole, filling an etch stop layer in the first hole and over the reflective metal pattern, forming a second stacked structure over the first stacked structure, and forming a second hole penetrating the second stacked structure to expose the etch stop layer.

First claim

What is claimed is:

1. A method of manufacturing a semiconductor device, the method comprising:
forming a first stacked structure;
forming a first hole penetrating the first stacked structure;
forming a reflective metal pattern in the first hole;
filling an etch stop layer in the first hole and over the reflective metal pattern;
forming a second stacked structure over the first stacked structure; and
forming a second hole penetrating the second stacked structure to expose the etch stop layer,
wherein the first hole includes an air-gap surrounded by the reflective metal pattern and disposed below the etch stop layer.

2. The method of claim 1 ,
wherein an etching selection ratio of the etch stop layer over the second stacked structure is higher than an etching selection ratio of the reflective metal pattern over the second stacked structure.

3. The method of claim 1 ,
wherein the reflective metal pattern and the etch stop layer are formed of different materials from each other.

4. The method of claim 1 , wherein the reflective metal pattern includes tungsten (W).

5. The method of claim 1 , wherein the etch stop layer includes a titanium nitride layer (TiN).

6. The method of claim 1 , further comprising:
removing the etch stop layer and the reflective metal pattern from the first hole so that the second hole is coupled to the first hole,
wherein the first hole and the second hole, in combination, form a combined hole, and
wherein the combined hole penetrates the first and the second stack structures.

7. The method of claim 6 , further comprising:
forming a multi-layered stack over a sidewall of the combined hole; and
forming a channel layer over the multi-layered stack.

8. The method of claim 1 ,
wherein the first stacked structure includes first material layers and second material layers, which are alternately stacked over each other, and
wherein the second stacked structure includes third material layers and fourth material layers, which are alternately stacked over each other.

9. The method of claim 8 ,
wherein an etching ratio of the reflective metal pattern over the first to fourth material layers is different from an etching ratio of the etch stop layer over the first to fourth material layers.

10. A method of manufacturing a semiconductor device, the method comprising:
forming a first stacked structure;
forming a first hole penetrating the first stacked structure;
forming a reflective metal pattern in the first hole;
filling an etch stop layer in the first hole and over the reflective metal pattern;
forming a second stacked structure over the first stacked structure; and
forming a second hole penetrating the second stacked structure to expose the etch stop layer,
wherein forming of the reflective metal pattern includes:
forming a reflective metal layer filling up the first hole; and
removing an upper portion of the reflective metal layer to form the reflective metal pattern and a first opening,
wherein the first opening is formed in the first hole and over the reflective metal pattern, and
wherein the etch stop layer is formed in the first opening.

11. The method of claim 10 ,
wherein the reflective metal layer extends over the first stacked structure into the first hole to form an overhang structure in the first hole.

12. The method of claim 10 , further comprising:
removing the etch stop layer and the reflective metal pattern from the first hole so that the second hole is coupled to the first hole, wherein the first hole and the second hole, in combination, form a combined hole; and
forming a channel layer within the combined hole.

Assignees

• Sk Hynix Inc

Inventors

• Kwon Woo June
• Kim Jong Hoon
• Hyun Chan Sun

Classifications

• H10P50/283

  by chemical means · CPC title

• H10W46/501

  for use before dicing · CPC title

• H10W46/301

  for alignment · CPC title

• H10W46/00

  Marks applied to devices, e.g. for alignment or identification · CPC title

• H10W20/089

  using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning · CPC title