Multi-layer wiring board and method of manufacturing the same

US9907189B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9907189-B2
Application numberUS-201414257192-A
CountryUS
Kind codeB2
Filing dateApr 21, 2014
Priority dateApr 22, 2013
Publication dateFeb 27, 2018
Grant dateFeb 27, 2018

How to read this patent

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A multi-layer wiring board is configured having stacked therein, in a stacking direction, via an adhesive layer, a plurality of printed wiring bases in each of which a wiring pattern and a via are formed on/in a resin base. A multi-layer wiring board includes a movable portion configured from an elastic member and a void portion, the movable portion being formed in the printed wiring bases and adhesive layer in a periphery of a matrix-shaped plurality of multi-layer wiring portions disposed at a certain interval as viewed in a planar manner, and the movable portion joining the plurality of multi-layer wiring portions such that each of the multi-layer wiring portions is displaceable in the stacking direction and a direction of surfaces of the printed wiring bases.

First claim

Opening claim text (preview).

What is claimed is: 1. A multi-layer wiring board, comprising: a plurality of printed wiring bases stacked, in a stacking direction, by an adhesive layer, the plurality of printed wiring bases each having a wiring pattern formed on a resin base and a via formed in the resin base; a plurality of multi-layer wiring portions disposed in a matrix of at least 2×2 or more; and a movable portion configured from an elastic member, the movable portion is provided between the plurality of multi-layer wiring portions to join the plurality of multi-layer wiring portions in a crisscross manner, wherein each of the multi-layer wiring portions comprises a component built-in portion having an electronic component built in internally thereto in the stacking direction, the electronic component being disposed in an opening provided to a first resin base of the resin bases, the multi-layer wiring board includes a recess recessed from one surface along the stacking direction and penetrating the first resin base provided with the opening, the elastic member of the movable portion fills the recess in the stacking direction. 2. The multi-layer wiring board according to claim 1 , wherein a void portion is formed in a certain region surrounded by the plurality of multi-layer wiring portions and the movable portion. 3. The multi-layer wiring board according to claim 1 , wherein the elastic member is configured from heat-resistant rubber. 4. The multi-layer wiring board according to claim 2 , wherein the elastic member is configured from heat-resistant rubber. 5. The multi-layer wiring board according to claim 1 , wherein the elastic member is configured from silicone rubber or fluoro rubber. 6. The multi-layer wiring board according to claim 2 , wherein the elastic member is configured from silicone rubber or fluoro rubber.

Assignees

Inventors

Classifications

  • H05K3/4697Primary

    having cavities, e.g. for mounting components (H05K3/4691 takes precedence) · CPC title

  • characterised by the use of flexible or folded printed circuits · CPC title

  • Assembling bases · CPC title

  • Flip chip · CPC title

  • of preperforated insulating layer · CPC title

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Frequently asked questions

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What does patent US9907189B2 cover?
A multi-layer wiring board is configured having stacked therein, in a stacking direction, via an adhesive layer, a plurality of printed wiring bases in each of which a wiring pattern and a via are formed on/in a resin base. A multi-layer wiring board includes a movable portion configured from an elastic member and a void portion, the movable portion being formed in the printed wiring bases and …
Who is the assignee on this patent?
Fujikura Ltd
What technology area does this patent fall under?
Primary CPC classification H05K3/4697. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 27 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).