FINFET structure and method of forming same

Patent metadata

Field	Value
Publication number	US-9899380-B2
Application number	US-201615008313-A
Country	US
Kind code	B2
Filing date	Jan 27, 2016
Priority date	Feb 17, 2015
Publication date	Feb 20, 2018
Grant date	Feb 20, 2018

Abstract

A method of forming a semiconductor device includes providing a semiconductor substrate. The semiconductor substrate includes fins formed thereon and a patterned hard mask layer formed on a top surface of the fins. The method further includes: forming an isolation material layer covering the semiconductor substrate, the fins, and the patterned hard mask layer; performing planarization of the isolation material layer, stopping at the patterned hard mask layer; and performing oxygen ion implantation to form an oxygen injection region within the fins and the isolation material layer; back-etching the isolation material layer, stopping above the oxygen injection region, to form a remaining portion of the isolation material layer exposing a portion of the fins; and performing thermal annealing to cause a thermal oxidation of a portion of the fins through oxygen ions in the oxygen injection region, thereby forming an oxide layer within the plurality of fins.

First claim

What is claimed is:

1. A method of forming a semiconductor device, the method comprising:
providing a semiconductor substrate, the semiconductor substrate including a plurality of fins formed thereon and a patterned hard mask layer formed on a top surface of the plurality of fins;
forming by deposition an isolation material layer covering the semiconductor substrate, the plurality of fins, and the patterned hard mask layer;
performing planarization of the isolation material layer, stopping at the patterned hard mask layer;
performing oxygen ion implantation to form an oxygen injection region within the plurality of fins and the isolation material layer;
back-etching the isolation material layer, stopping above the oxygen injection region, to form a remaining portion of the isolation material layer exposing a portion of the plurality of fins; and
performing thermal annealing to cause a thermal oxidation of a portion of the plurality of fins through oxygen ions in the oxygen injection region, thereby forming an oxide layer within the plurality of fins.

2. The method of claim 1 , wherein the plurality of fins and the patterned hard mask layer are formed by:
forming a hard mask layer on a surface of the semiconductor substrate by deposition;
forming a patterned photoresist layer on the hard mask layer, the patterned photoresist layer defining the plurality of fins;
etching, using the patterned photoresist layer as a first mask, the hard mask layer to form the patterned hard mask layer;
etching, using the patterned hard mask layer as a second mask, the semiconductor substrate to form the plurality of fins.

3. The method of claim 1 , wherein the oxygen injection region is located below a predetermined exposed portion of the fins.

4. The method of claim 1 , wherein a bottom of the oxide layer is located near a bottom of the plurality of fins.

5. The method of claim 1 , wherein a top surface of the oxide layer is flush with or below a top surface of the remaining portion of the isolation material layer.

6. The method of claim 1 , wherein the isolation material layer comprises silicon oxide.

Assignees

• Semiconductor Mfg Int Shanghai Corp

Inventors

• Xie Xinyun
• Zhou Ming

Classifications

• H10P30/40

  into insulating materials · CPC title

• H10P14/6322

  Formation by thermal treatments (formation by plasma treatment H10P14/6319) · CPC title

• H10P30/209

  in silicon to make buried insulating layers · CPC title

• H10P30/208

  of electrically inactive species · CPC title

• H10P30/204

  into Group IV semiconductors · CPC title