Signal routing with reduced crosstalk

Patent metadata

Field	Value
Publication number	US-9893761-B2
Application number	US-201414496569-A
Country	US
Kind code	B2
Filing date	Sep 25, 2014
Priority date	Sep 25, 2014
Publication date	Feb 13, 2018
Grant date	Feb 13, 2018

Abstract

Generally, this disclosure provides systems and devices for reduction of crosstalk between routed signals. A system may include a first pair of signal lines and a second pair of signal lines and each of the pairs of signal lines include a positive signal line and a negative signal line to transmit a differential signal. The system may also include an alternating current coupling capacitor (AC cap) associated with each of the positive signal lines and each of the negative signal lines. The system may further include a routing crossover of the positive signal line and the negative signal line of the second pair of signal lines, to decrease signal crosstalk between the first and second pairs of signal lines. The routing crossover may include at least one of the AC caps.

First claim

What is claimed is:

1. A system comprising:
a plurality of signal lines disposed in a routing layer, said routing layer in a first plane; and
one or more conductive patches disposed in a conductive layer, said conductive layer in a second plane parallel to said first plane, said conductive patches arranged to increase capacitive coupling between said signal lines to decrease signal crosstalk between said signal lines, wherein widths of said plurality of signal lines are to compensate for reduced impedance associated with placement of said conductive layer between said routing layer and a ground reference layer.

2. The system of claim 1 , wherein said patches extend perpendicularly between pairs of adjacent lines of said plurality of signal lines.

3. The system of claim 1 , wherein said patches extend perpendicularly between three or more adjacent lines of said plurality of signal lines.

4. The system of claim 1 , wherein said patches are divided into segments, each of said segments to extend perpendicularly between adjacent pairs of lines of said plurality of signal lines.

5. The system of claim 1 , wherein said plurality of signal lines are incorporated in a microstrip or stripline.

6. The system of claim 1 , wherein said plurality of signal lines are to electrically couple components of a printed circuit board.

Assignees

• Intel Corp

Inventors

• Ye Xiaoning
• Chu Yunhui
• Yu Zhenwei

Classifications

• H05K2201/09727

  Varying width along a single conductor; Conductors or pads having different widths · CPC title

• H04B3/32 Primary

  Reducing cross-talk, e.g. by compensating · CPC title

• H05K1/0216

  Reduction of cross-talk, noise or electromagnetic interference (grounding H05K1/0215) · CPC title